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-rw-r--r--src/mainboard/asrock/imb-a180/OemCustomize.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/mainboard/asrock/imb-a180/OemCustomize.c b/src/mainboard/asrock/imb-a180/OemCustomize.c
index 63fed83b66..aec1343f02 100644
--- a/src/mainboard/asrock/imb-a180/OemCustomize.c
+++ b/src/mainboard/asrock/imb-a180/OemCustomize.c
@@ -17,6 +17,7 @@
#include "amdlib.h"
#include "Ids.h"
#include "heapManager.h"
+#include <PlatformMemoryConfiguration.h>
#include "Filecode.h"
#include <northbridge/amd/agesa/agesawrapper.h>
@@ -151,6 +152,37 @@ static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
return AGESA_SUCCESS;
}
+/*----------------------------------------------------------------------------------------
+ * CUSTOMER OVERIDES MEMORY TABLE
+ *----------------------------------------------------------------------------------------
+ */
+
+/*
+ * Platform Specific Overriding Table allows IBV/OEM to pass in platform information to AGESA
+ * (e.g. MemClk routing, the number of DIMM slots per channel,...). If PlatformSpecificTable
+ * is populated, AGESA will base its settings on the data from the table. Otherwise, it will
+ * use its default conservative settings.
+ */
+CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
+
+ #define SEED_A 0x12
+ HW_RXEN_SEED(
+ ANY_SOCKET, CHANNEL_A, ALL_DIMMS,
+ SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A,
+ SEED_A),
+
+ NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2),
+ NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 1),
+ MOTHER_BOARD_LAYERS (LAYERS_4),
+
+ MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00),
+ CKE_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08), /* TODO: bit2map, bit3map */
+ ODT_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08),
+ CS_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00),
+
+ PSO_END
+};
+
const struct OEM_HOOK OemCustomize = {
.InitEarly = OemInitEarly,
.InitMid = OemInitMid,