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-rw-r--r--src/mainboard/asrock/h110m/devicetree.cb3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb
index d6f29a20e9..57acd33570 100644
--- a/src/mainboard/asrock/h110m/devicetree.cb
+++ b/src/mainboard/asrock/h110m/devicetree.cb
@@ -18,9 +18,6 @@ chip soc/intel/skylake
register "gpe0_dw1" = "GPP_D"
register "gpe0_dw2" = "GPP_E"
- # Enable "Intel Speed Shift Technology"
- register "speed_shift_enable" = "1"
-
# Enable DPTF
register "dptf_enable" = "1"