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-rw-r--r--src/mainboard/asrock/e350m1/BiosCallOuts.c1
-rw-r--r--src/mainboard/asrock/e350m1/mptable.c2
-rw-r--r--src/mainboard/asrock/e350m1/platform_cfg.h2
-rw-r--r--src/mainboard/asrock/g41c-gs/hda_verb.c1
-rw-r--r--src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/gpio.c1
-rw-r--r--src/mainboard/asrock/imb-a180/OemCustomize.c1
-rw-r--r--src/mainboard/asrock/imb-a180/mptable.c1
7 files changed, 0 insertions, 9 deletions
diff --git a/src/mainboard/asrock/e350m1/BiosCallOuts.c b/src/mainboard/asrock/e350m1/BiosCallOuts.c
index 6bd2f981a8..391b308941 100644
--- a/src/mainboard/asrock/e350m1/BiosCallOuts.c
+++ b/src/mainboard/asrock/e350m1/BiosCallOuts.c
@@ -6,7 +6,6 @@
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <SB800.h>
-
static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr);
const BIOS_CALLOUT_STRUCT BiosCallouts[] =
diff --git a/src/mainboard/asrock/e350m1/mptable.c b/src/mainboard/asrock/e350m1/mptable.c
index fe0d50e71c..81e2bac79d 100644
--- a/src/mainboard/asrock/e350m1/mptable.c
+++ b/src/mainboard/asrock/e350m1/mptable.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
@@ -9,7 +8,6 @@
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
-
u8 intr_data[] = {
[0x00] = 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, /* INTA# - INTH# */
[0x08] = 0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F, /* Misc-nil,0,1,2, INT from Serial irq */
diff --git a/src/mainboard/asrock/e350m1/platform_cfg.h b/src/mainboard/asrock/e350m1/platform_cfg.h
index 21ecebe51b..6d3ea82233 100644
--- a/src/mainboard/asrock/e350m1/platform_cfg.h
+++ b/src/mainboard/asrock/e350m1/platform_cfg.h
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-
#ifndef _PLATFORM_CFG_H_
#define _PLATFORM_CFG_H_
@@ -109,7 +108,6 @@
*/
#define SATA_PORT_MULT_CAP_RESERVED 1
-
/**
* @def AZALIA_AUTO
* @brief Detect Azalia controller automatically.
diff --git a/src/mainboard/asrock/g41c-gs/hda_verb.c b/src/mainboard/asrock/g41c-gs/hda_verb.c
index 42555bf7b5..2c9f6347c4 100644
--- a/src/mainboard/asrock/g41c-gs/hda_verb.c
+++ b/src/mainboard/asrock/g41c-gs/hda_verb.c
@@ -32,7 +32,6 @@ const u32 cim_verb_data[] = {
AZALIA_PIN_CFG(1, 0x03, 0x18560010),
-
/* coreboot specific header */
/* Realtek ALC662 rev1 */
0x10ec0662, /* Vendor ID */
diff --git a/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/gpio.c b/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/gpio.c
index 722e4cc7b3..87ace2c933 100644
--- a/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/gpio.c
+++ b/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/gpio.c
@@ -88,7 +88,6 @@ static const struct pch_gpio_set2 pch_gpio_set2_level = {
.gpio33 = GPIO_LEVEL_HIGH,
};
-
const struct pch_gpio_map mainboard_gpio_map = {
.set1 = {
.mode = &pch_gpio_set1_mode,
diff --git a/src/mainboard/asrock/imb-a180/OemCustomize.c b/src/mainboard/asrock/imb-a180/OemCustomize.c
index b1e3e88d59..b97be80398 100644
--- a/src/mainboard/asrock/imb-a180/OemCustomize.c
+++ b/src/mainboard/asrock/imb-a180/OemCustomize.c
@@ -5,7 +5,6 @@
#include <northbridge/amd/agesa/state_machine.h>
-
static const PCIe_PORT_DESCRIPTOR PortList[] = {
{
0,
diff --git a/src/mainboard/asrock/imb-a180/mptable.c b/src/mainboard/asrock/imb-a180/mptable.c
index 20c4b8d781..4761728927 100644
--- a/src/mainboard/asrock/imb-a180/mptable.c
+++ b/src/mainboard/asrock/imb-a180/mptable.c
@@ -7,7 +7,6 @@
#include <stdint.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
-
u8 picr_data[0x54] = {
0x03,0x04,0x05,0x07,0x0B,0x0A,0x1F,0x1F,0xFA,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x03,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,