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-rw-r--r--src/mainboard/asrock/g41c-gs/romstage.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c
index 0228499181..bb7a342d75 100644
--- a/src/mainboard/asrock/g41c-gs/romstage.c
+++ b/src/mainboard/asrock/g41c-gs/romstage.c
@@ -36,7 +36,6 @@
static void mb_lpc_setup(void)
{
- u32 reg32;
/* Set the value for GPIO base address register and enable GPIO. */
pci_write_config32(LPC_DEV, GPIO_BASE, (DEFAULT_GPIOBASE | 1));
pci_write_config8(LPC_DEV, GPIO_CNTL, 0x10);
@@ -65,11 +64,7 @@ static void mb_lpc_setup(void)
RCBA8(OIC) = 0x03;
RCBA8(OIC);
- reg32 = RCBA32(GCS);
- reg32 |= (1 << 5);
- RCBA32(GCS) = reg32;
-
- RCBA32(CG) = 0x00000001;
+ ich7_setup_cir();
}
static void ich7_enable_lpc(void)