diff options
Diffstat (limited to 'src/mainboard/asus/m2v-mx_se/romstage.c')
-rw-r--r-- | src/mainboard/asus/m2v-mx_se/romstage.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index 0b1555c2e4..93b9202045 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -70,7 +70,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) static void ldtstop_sb(void) { - print_debug("toggle LDTSTP#\n"); + printk(BIOS_DEBUG, "toggle LDTSTP#\n"); /* fix errata #181, disable DRAM controller it will get enabled later */ u8 tmp = pci_read_config8(PCI_DEV(0, 0x18, 2), 0x94); @@ -81,7 +81,7 @@ static void ldtstop_sb(void) reg = reg ^ (1 << 0); outb(reg, VT8237R_ACPI_IO_BASE + 0x5c); reg = inb(VT8237R_ACPI_IO_BASE + 0x15); - print_debug("done\n"); + printk(BIOS_DEBUG, "done\n"); } #include "cpu/amd/model_fxx/fidvid.c" @@ -92,7 +92,7 @@ void soft_reset(void) uint8_t tmp; set_bios_reset(); - print_debug("soft reset\n"); + printk(BIOS_DEBUG, "soft reset\n"); /* PCI reset */ tmp = pci_read_config8(PCI_DEV(0, 0x11, 0), 0x4f); @@ -154,11 +154,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) ht_setup_chains_x(sysinfo); /* Init sblnk and sbbusn, nodes, sbdn. */ needs_reset = optimize_link_coherent_ht(); - print_debug_hex8(needs_reset); + printk(BIOS_DEBUG, "%02x", needs_reset); needs_reset |= optimize_link_incoherent_ht(sysinfo); - print_debug_hex8(needs_reset); + printk(BIOS_DEBUG, "%02x", needs_reset); needs_reset |= k8t890_early_setup_ht(); - print_debug_hex8(needs_reset); + printk(BIOS_DEBUG, "%02x", needs_reset); vt8237_early_network_init(NULL); vt8237_early_spi_init(); @@ -174,7 +174,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) vt8237_sb_enable_fid_vid(); enable_fid_change(); - print_debug("after enable_fid_change\n"); + printk(BIOS_DEBUG, "after enable_fid_change\n"); init_fidvid_bsp(bsp_apicid); |