diff options
Diffstat (limited to 'src/mainboard/asus/p3b-f')
| -rw-r--r-- | src/mainboard/asus/p3b-f/Kconfig | 31 | ||||
| -rw-r--r-- | src/mainboard/asus/p3b-f/Kconfig.name | 2 | ||||
| -rw-r--r-- | src/mainboard/asus/p3b-f/board_info.txt | 7 | ||||
| -rw-r--r-- | src/mainboard/asus/p3b-f/devicetree.cb | 59 | ||||
| -rw-r--r-- | src/mainboard/asus/p3b-f/irq_tables.c | 34 | ||||
| -rw-r--r-- | src/mainboard/asus/p3b-f/romstage.c | 48 |
6 files changed, 0 insertions, 181 deletions
diff --git a/src/mainboard/asus/p3b-f/Kconfig b/src/mainboard/asus/p3b-f/Kconfig deleted file mode 100644 index 41989cacbd..0000000000 --- a/src/mainboard/asus/p3b-f/Kconfig +++ /dev/null @@ -1,31 +0,0 @@ -## -## This file is part of the coreboot project. -## -## -## SPDX-License-Identifier: GPL-2.0-only - -if BOARD_ASUS_P3B_F - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select CPU_INTEL_SLOT_1 - select NORTHBRIDGE_INTEL_I440BX - select SOUTHBRIDGE_INTEL_I82371EB - select SUPERIO_WINBOND_W83977TF - select HAVE_PIRQ_TABLE - select BOARD_ROMSIZE_KB_256 - select SDRAMPWR_4DIMM - -config MAINBOARD_DIR - string - default "asus/p3b-f" - -config MAINBOARD_PART_NUMBER - string - default "P3B-F" - -config IRQ_SLOT_COUNT - int - default 8 - -endif # BOARD_ASUS_P3B_F diff --git a/src/mainboard/asus/p3b-f/Kconfig.name b/src/mainboard/asus/p3b-f/Kconfig.name deleted file mode 100644 index cf1d9b50a7..0000000000 --- a/src/mainboard/asus/p3b-f/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_ASUS_P3B_F - bool "P3B-F" diff --git a/src/mainboard/asus/p3b-f/board_info.txt b/src/mainboard/asus/p3b-f/board_info.txt deleted file mode 100644 index a1657431b7..0000000000 --- a/src/mainboard/asus/p3b-f/board_info.txt +++ /dev/null @@ -1,7 +0,0 @@ -Category: desktop -Board URL: ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p3b-f/ -ROM package: DIP32 -ROM protocol: Parallel -ROM socketed: y -Flashrom support: y -Release year: 1999 diff --git a/src/mainboard/asus/p3b-f/devicetree.cb b/src/mainboard/asus/p3b-f/devicetree.cb deleted file mode 100644 index bc9ad17c93..0000000000 --- a/src/mainboard/asus/p3b-f/devicetree.cb +++ /dev/null @@ -1,59 +0,0 @@ -chip northbridge/intel/i440bx # Northbridge - device cpu_cluster 0 on # APIC cluster - chip cpu/intel/slot_1 # CPU - device lapic 0 on end # APIC - end - end - device domain 0 on # PCI domain - device pci 0.0 on end # Host bridge - device pci 1.0 on end # PCI/AGP bridge - chip southbridge/intel/i82371eb # Southbridge - device pci 4.0 on # ISA bridge - chip superio/winbond/w83977tf # Super I/O (FIXME: It's W83977EF!) - device pnp 3f0.0 on # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 3f0.1 on # Parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 3f0.2 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 3f0.3 on # COM2 / IR - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 3f0.5 on # PS/2 keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 # PS/2 keyboard interrupt - irq 0x72 = 12 # PS/2 mouse interrupt - end - device pnp 3f0.6 on # Consumer IR - end - device pnp 3f0.7 on # GPIO 1 - end - device pnp 3f0.8 on # GPIO 2 - end - device pnp 3f0.a on # ACPI - end - end - end - device pci 4.1 on end # IDE - device pci 4.2 on end # USB - device pci 4.3 on end # ACPI - register "ide0_enable" = "1" - register "ide1_enable" = "1" - register "ide_legacy_enable" = "1" - # Enable UDMA/33 for higher speed if your IDE device(s) support it. - register "ide0_drive0_udma33_enable" = "0" - register "ide0_drive1_udma33_enable" = "0" - register "ide1_drive0_udma33_enable" = "0" - register "ide1_drive1_udma33_enable" = "0" - end - end -end diff --git a/src/mainboard/asus/p3b-f/irq_tables.c b/src/mainboard/asus/p3b-f/irq_tables.c deleted file mode 100644 index c0c5aa25da..0000000000 --- a/src/mainboard/asus/p3b-f/irq_tables.c +++ /dev/null @@ -1,34 +0,0 @@ -/* This file is part of the coreboot project. */ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, - PIRQ_VERSION, - 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */ - 0x00, /* Interrupt router bus */ - (0x04 << 3) | 0x0, /* Interrupt router device */ - 0, /* IRQs devoted exclusively to PCI usage */ - 0x8086, /* Vendor */ - 0x122e, /* Device */ - 0, /* Miniport data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x95, /* Checksum */ - { - /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00,(0x0c << 3)|0x0, {{0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x01eb8}}, 0x1, 0x0}, - {0x00,(0x0b << 3)|0x0, {{0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}, {0x60, 0x01eb8}}, 0x2, 0x0}, - {0x00,(0x0a << 3)|0x0, {{0x62, 0x1eb8}, {0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x01eb8}}, 0x3, 0x0}, - {0x00,(0x09 << 3)|0x0, {{0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x01eb8}}, 0x4, 0x0}, - {0x00,(0x0d << 3)|0x0, {{0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x01eb8}}, 0x5, 0x0}, - {0x00,(0x0e << 3)|0x0, {{0x62, 0x1eb8}, {0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x01eb8}}, 0x6, 0x0}, - {0x00,(0x04 << 3)|0x0, {{0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x01eb8}}, 0x0, 0x0}, - {0x00,(0x01 << 3)|0x0, {{0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x01eb8}}, 0x0, 0x0}, - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/asus/p3b-f/romstage.c b/src/mainboard/asus/p3b-f/romstage.c deleted file mode 100644 index 475da286d0..0000000000 --- a/src/mainboard/asus/p3b-f/romstage.c +++ /dev/null @@ -1,48 +0,0 @@ -/* This file is part of the coreboot project. */ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <arch/io.h> -#include <southbridge/intel/i82371eb/i82371eb.h> -#include <northbridge/intel/i440bx/raminit.h> -#include <superio/winbond/common/winbond.h> -/* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ -#include <superio/winbond/w83977tf/w83977tf.h> - -/* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ -#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) - -/* - * ASUS P3B-F specific SPD enable magic. - * - * Setting the byte at offset 0x37 in the PM I/O space to 0x6f will make the - * board DIMMs accessible at SMBus/SPD offsets 0x50-0x53. Per default the SPD - * offsets 0x50-0x53 are _not_ readable (all SPD reads will return 0xff) which - * will make RAM init fail. - * - * Tested values for PM I/O offset 0x37: - * 0x67: 11 00 111: Only SMBus/I2C offsets 0x48/0x49/0x2d accessible - * 0x6f: 11 01 111: Only SMBus/I2C offsets 0x50-0x53 (SPD) accessible - * 0x77: 11 10 111: Only SMBus/I2C offset 0x69 accessible - * - * PM I/O space offset 0x37 is GPOREG[31:24], i.e. it controls the GPIOs - * 24-30 of the PIIX4E (bit 31 is reserved). Thus, GPIOs 27 and 28 - * control which SMBus/I2C offsets can be accessed. - */ -void enable_spd(void) -{ - outb(0x6f, PM_IO_BASE + 0x37); -} - -/* - * Disable SPD access after RAM init to allow access to SMBus/I2C offsets - * 0x48/0x49/0x2d, which is required e.g. by lm-sensors. - */ -void disable_spd(void) -{ - outb(0x67, PM_IO_BASE + 0x37); -} - -void mainboard_enable_serial(void) -{ - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} |