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Diffstat (limited to 'src/mainboard/asus/p5gc-mx')
-rw-r--r--src/mainboard/asus/p5gc-mx/devicetree.cb3
-rw-r--r--src/mainboard/asus/p5gc-mx/romstage.c16
2 files changed, 4 insertions, 15 deletions
diff --git a/src/mainboard/asus/p5gc-mx/devicetree.cb b/src/mainboard/asus/p5gc-mx/devicetree.cb
index 972dc5dc1f..b5409a25bb 100644
--- a/src/mainboard/asus/p5gc-mx/devicetree.cb
+++ b/src/mainboard/asus/p5gc-mx/devicetree.cb
@@ -55,6 +55,9 @@ chip northbridge/intel/i945
register "p_cnt_throttling_supported" = "0"
+ # SuperIO Power Management Events
+ register "gen1_dec" = "0x00040291"
+
device pci 1b.0 on # High Definition Audio
ioapic_irq 2 INTA 0x10
end
diff --git a/src/mainboard/asus/p5gc-mx/romstage.c b/src/mainboard/asus/p5gc-mx/romstage.c
index 58dac6e71c..3287b76416 100644
--- a/src/mainboard/asus/p5gc-mx/romstage.c
+++ b/src/mainboard/asus/p5gc-mx/romstage.c
@@ -96,20 +96,6 @@ static u8 msr_get_fsb(void)
return fsbcfg;
}
-static void ich7_enable_lpc(void)
-{
- // Enable Serial IRQ
- pci_write_config8(PCI_DEV(0, 0x1f, 0), SERIRQ_CNTL, 0xd0);
- // Set COM1/COM2 decode range
- pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC, 0x0010);
- // Enable COM1
- pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, CNF1_LPC_EN
- | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN | COMB_LPC_EN
- | COMA_LPC_EN);
- // Enable SuperIO Power Management Events
- pci_write_config32(PCI_DEV(0, 0x1f, 0), GEN1_DEC, 0x00040291);
-}
-
static void rcba_config(void)
{
/* Enable IOAPIC */
@@ -156,7 +142,7 @@ void mainboard_romstage_entry(void)
enable_lapic();
- ich7_enable_lpc();
+ i82801gx_lpc_setup();
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);