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-rw-r--r--src/mainboard/asus/am1i-a/romstage.c1
-rw-r--r--src/mainboard/asus/f2a85-m/romstage.c1
-rw-r--r--src/mainboard/asus/h61m-cs/romstage.c1
-rw-r--r--src/mainboard/asus/kfsn4-dre/bootblock.c1
-rw-r--r--src/mainboard/asus/kfsn4-dre/romstage.c1
-rw-r--r--src/mainboard/asus/maximus_iv_gene-z/romstage.c2
-rw-r--r--src/mainboard/asus/p5gc-mx/romstage.c1
-rw-r--r--src/mainboard/asus/p5qpl-am/romstage.c1
-rw-r--r--src/mainboard/asus/p8h61-m_pro/romstage.c1
9 files changed, 9 insertions, 1 deletions
diff --git a/src/mainboard/asus/am1i-a/romstage.c b/src/mainboard/asus/am1i-a/romstage.c
index c42b86c288..a692167dd2 100644
--- a/src/mainboard/asus/am1i-a/romstage.c
+++ b/src/mainboard/asus/am1i-a/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pnp_ops.h>
#include <device/pci_ops.h>
#include <commonlib/loglevel.h>
#include <northbridge/amd/agesa/state_machine.h>
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index db50765a82..bed5a731cf 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pnp_type.h>
#include <device/pci_ops.h>
#include <northbridge/amd/agesa/state_machine.h>
diff --git a/src/mainboard/asus/h61m-cs/romstage.c b/src/mainboard/asus/h61m-cs/romstage.c
index a0083fb354..94f58c1e36 100644
--- a/src/mainboard/asus/h61m-cs/romstage.c
+++ b/src/mainboard/asus/h61m-cs/romstage.c
@@ -17,6 +17,7 @@
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <device/pci_ops.h>
+#include <device/pnp_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h>
diff --git a/src/mainboard/asus/kfsn4-dre/bootblock.c b/src/mainboard/asus/kfsn4-dre/bootblock.c
index ec8b2daee1..796ca1a64e 100644
--- a/src/mainboard/asus/kfsn4-dre/bootblock.c
+++ b/src/mainboard/asus/kfsn4-dre/bootblock.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pnp_ops.h>
#include <pc80/mc146818rtc.h>
#include <superio/winbond/common/winbond.h>
diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c
index 66ebbdc555..ae778f2020 100644
--- a/src/mainboard/asus/kfsn4-dre/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/pnp_ops.h>
#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/asus/maximus_iv_gene-z/romstage.c b/src/mainboard/asus/maximus_iv_gene-z/romstage.c
index d32b6f9735..f0506fb84e 100644
--- a/src/mainboard/asus/maximus_iv_gene-z/romstage.c
+++ b/src/mainboard/asus/maximus_iv_gene-z/romstage.c
@@ -14,7 +14,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/pnp_ops.h>
#include <device/pci_ops.h>
#include <device/dram/ddr3.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/asus/p5gc-mx/romstage.c b/src/mainboard/asus/p5gc-mx/romstage.c
index 649380934f..2f45113d8d 100644
--- a/src/mainboard/asus/p5gc-mx/romstage.c
+++ b/src/mainboard/asus/p5gc-mx/romstage.c
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pnp_ops.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/asus/p5qpl-am/romstage.c b/src/mainboard/asus/p5qpl-am/romstage.c
index c172ef8459..c59f38cd36 100644
--- a/src/mainboard/asus/p5qpl-am/romstage.c
+++ b/src/mainboard/asus/p5qpl-am/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pnp_ops.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
diff --git a/src/mainboard/asus/p8h61-m_pro/romstage.c b/src/mainboard/asus/p8h61-m_pro/romstage.c
index 63daa2ec99..73848285a9 100644
--- a/src/mainboard/asus/p8h61-m_pro/romstage.c
+++ b/src/mainboard/asus/p8h61-m_pro/romstage.c
@@ -14,6 +14,7 @@
*/
#include <device/pci_ops.h>
+#include <device/pnp_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h>