summaryrefslogtreecommitdiff
path: root/src/mainboard/asus
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r--src/mainboard/asus/kfsn4-dre/Kconfig1
-rw-r--r--src/mainboard/asus/kfsn4-dre/devicetree.cb72
-rw-r--r--src/mainboard/asus/kfsn4-dre/spd_notes.txt16
3 files changed, 89 insertions, 0 deletions
diff --git a/src/mainboard/asus/kfsn4-dre/Kconfig b/src/mainboard/asus/kfsn4-dre/Kconfig
index 20ff380219..03f3b7cdff 100644
--- a/src/mainboard/asus/kfsn4-dre/Kconfig
+++ b/src/mainboard/asus/kfsn4-dre/Kconfig
@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select ENABLE_APIC_EXT_ID
select AMDMCT
select MMCONF_SUPPORT_DEFAULT
+ select DRIVERS_I2C_W83793
select DRIVERS_XGI_Z9S
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
diff --git a/src/mainboard/asus/kfsn4-dre/devicetree.cb b/src/mainboard/asus/kfsn4-dre/devicetree.cb
index 3e0e41e5e7..928790b5d8 100644
--- a/src/mainboard/asus/kfsn4-dre/devicetree.cb
+++ b/src/mainboard/asus/kfsn4-dre/devicetree.cb
@@ -75,6 +75,78 @@ chip northbridge/amd/amdfam10/root_complex # Root complex
chip drivers/generic/generic # DIMM n-1-1-1
device i2c 57 on end
end
+ chip drivers/i2c/w83793
+ register "mfc" = "0x29" # Enable FANIN1/FANIN12, FANIN9/FANIN10, and FANIN8/FANCTRL8 inputs
+ register "fanin" = "0x7f" # Enable monitoring of FANIN6 - FANIN12
+ register "fanin_sel" = "0x0f" # Connect FANIN9 - FANIN12 to pins 37 - 40
+ register "peci_agent_conf" = "0x33" # Set Intel CPU PECI agent domain (not used by AMD but may affect chip operation)
+ register "tcase0" = "94" # Set maximum Intel CPU case temperature to 94°C (not used by AMD but may affect chip operation)
+ register "tcase1" = "94" # Set maximum Intel CPU case temperature to 94°C (not used by AMD but may affect chip operation)
+ register "tcase2" = "94" # Set maximum Intel CPU case temperature to 94°C (not used by AMD but may affect chip operation)
+ register "tcase3" = "94" # Set maximum Intel CPU case temperature to 94°C (not used by AMD but may affect chip operation)
+ register "tr_enable" = "0x03" # Enable montoring of TR1 and TR2
+ register "td_mode_select" = "0x05" # Use internal temperature sensors and disable unconnected TD3/TD4
+ register "td1_critical_temperature" = "85" # Set TD1 (CPU0) critical temperature to 85°C
+ register "td1_critical_hysteresis" = "80" # Set TD1 (CPU0) critical hysteresis temperature to 80°C
+ register "td1_warning_temperature" = "70" # Set TD1 (CPU0) warning temperature to 70°C
+ register "td1_warning_hysteresis" = "65" # Set TD1 (CPU0) warning hysteresis temperature to 65°C
+ register "td2_critical_temperature" = "85" # Set TD2 (CPU1) critical temperature to 85°C
+ register "td2_critical_hysteresis" = "80" # Set TD2 (CPU1) critical hysteresis temperature to 80°C
+ register "td2_warning_temperature" = "70" # Set TD2 (CPU1) warning temperature to 70°C
+ register "td2_warning_hysteresis" = "65" # Set TD2 (CPU1) warning hysteresis temperature to 65°C
+ register "tr1_critical_temperature" = "60" # Set TR1 (mainboard) critical temperature to 60°C
+ register "tr1_critical_hysteresis" = "55" # Set TR1 (mainboard) critical hysteresis temperature to 55°C
+ register "tr1_warning_temperature" = "50" # Set TR1 (mainboard) warning temperature to 50°C
+ register "tr1_warning_hysteresis" = "45" # Set TR1 (mainboard) warning hysteresis temperature to 45°C
+ register "critical_temperature" = "80" # Set critical temperature to 80°C
+ register "fanctrl1" = "0x48" # Set Fan 4 and Fan 7 to output buffer mode, all others to open drain
+ register "fanctrl2" = "0x01" # Set Fan 4 to Fan 7 to output buffer mode, Fan 1 to DC mode
+ register "first_valid_fan_number" = "2" # Fan 1/Fan 2 controls and sensors are not connected to anything
+ register "td1_fan_select" = "0x00" # All fans to manual mode (no dependence on TD1)
+ register "td2_fan_select" = "0x00" # All fans to manual mode (no dependence on TD2)
+ register "td3_fan_select" = "0x00" # All fans to manual mode (no dependence on TD3)
+ register "td4_fan_select" = "0x00" # All fans to manual mode (no dependence on TD4)
+ register "tr1_fan_select" = "0x00" # All fans to manual mode (no dependence on TR1)
+ register "tr2_fan_select" = "0x00" # All fans to manual mode (no dependence on TR2)
+ register "fan1_nonstop" = "7" # Set Fan 1 minimum speed
+ register "fan2_nonstop" = "7" # Set Fan 2 minimum speed
+ register "fan3_nonstop" = "7" # Set Fan 3 minimum speed
+ register "fan4_nonstop" = "7" # Set Fan 4 minimum speed
+ register "fan5_nonstop" = "7" # Set Fan 5 minimum speed
+ register "fan6_nonstop" = "7" # Set Fan 6 minimum speed
+ register "fan7_nonstop" = "7" # Set Fan 7 minimum speed
+ register "fan8_nonstop" = "7" # Set Fan 8 minimum speed
+ register "default_speed" = "100" # All fans to full speed on power up
+ register "fan1_duty" = "100" # Fan 1 to full speed
+ register "fan2_duty" = "100" # Fan 2 to full speed
+ register "fan3_duty" = "100" # Fan 3 to full speed
+ register "fan4_duty" = "100" # Fan 4 to full speed
+ register "fan5_duty" = "100" # Fan 5 to full speed
+ register "fan6_duty" = "100" # Fan 6 to full speed
+ register "fan7_duty" = "100" # Fan 7 to full speed
+ register "fan8_duty" = "100" # Fan 8 to full speed
+ register "vcorea_high_limit_mv" = "1500" # VCOREA (Node 0) high limit to 1.5V
+ register "vcorea_low_limit_mv" = "900" # VCOREA (Node 0) low limit to 0.9V
+ register "vcoreb_high_limit_mv" = "1500" # VCOREB (Node 1) high limit to 1.5V
+ register "vcoreb_low_limit_mv" = "900" # VCOREB (Node 1) low limit to 0.9V
+ register "vtt_high_limit_mv" = "1250" # VTT (HT link voltage) high limit to 1.25V
+ register "vtt_low_limit_mv" = "1150" # VTT (HT link voltage) low limit to 1.15V
+ register "vsen1_high_limit_mv" = "1900" # VSEN1 (Node 0 RAM voltage) high limit to 1.9V
+ register "vsen1_low_limit_mv" = "1700" # VSEN1 (Node 0 RAM voltage) low limit to 1.7V
+ register "vsen2_high_limit_mv" = "1900" # VSEN2 (Node 1 RAM voltage) high limit to 1.9V
+ register "vsen2_low_limit_mv" = "1700" # VSEN2 (Node 1 RAM voltage) low limit to 1.7V
+ register "vsen3_high_limit_mv" = "3500" # VSEN3 (+3.3V) high limit to 3.5V
+ register "vsen3_low_limit_mv" = "3100" # VSEN3 (+3.3V) low limit to 3.1V
+ register "vsen4_high_limit_mv" = "1070" # VSEN4 (+12V, scaling factor ~12.15) high limit to 13V
+ register "vsen4_low_limit_mv" = "905" # VSEN4 (+12V, scaling factor ~12.15) low limit to 11V
+ register "vdd_high_limit_mv" = "5200" # 5VDD high limit to 5.2V
+ register "vdd_low_limit_mv" = "4800" # 5VDD low limit to 4.8V
+ register "vsb_high_limit_mv" = "5200" # 5VSB high limit to 5.2V
+ register "vsb_low_limit_mv" = "4800" # 5VSB low limit to 4.8V
+ register "vbat_high_limit_mv" = "3500" # VBAT (+3V) high limit to 3.5V
+ register "vbat_low_limit_mv" = "2500" # VBAT (+3V) low limit to 2.5V
+ device i2c 0x2f on end
+ end
end
device pci 1.1 on end # SM 1
device pci 2.0 on end # USB 1.1
diff --git a/src/mainboard/asus/kfsn4-dre/spd_notes.txt b/src/mainboard/asus/kfsn4-dre/spd_notes.txt
index ff49c18518..d7440f09d1 100644
--- a/src/mainboard/asus/kfsn4-dre/spd_notes.txt
+++ b/src/mainboard/asus/kfsn4-dre/spd_notes.txt
@@ -24,6 +24,22 @@ CK804 pin W2 <--> GPIO43
CK804 pin W3 <--> GPIO44
====================================================================================================
+W83793 (U46)
+====================================================================================================
+
+Sensor mappings:
+FRNT_FAN1: FAN3
+FRNT_FAN2: FAN4
+FRNT_FAN3: FAN5
+FRNT_FAN4: FAN6
+FRNT_FAN5: FAN9
+FRNT_FAN6: FAN10
+REAR_FAN1: FAN7
+REAR_FAN2: FAN8
+REAR_FAN3: FAN11
+REAR_FAN4: FAN12
+
+====================================================================================================
Other hardware
====================================================================================================