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-rw-r--r--src/mainboard/asus/am1i-a/buildOpts.c27
-rw-r--r--src/mainboard/asus/f2a85-m/buildOpts.c27
2 files changed, 0 insertions, 54 deletions
diff --git a/src/mainboard/asus/am1i-a/buildOpts.c b/src/mainboard/asus/am1i-a/buildOpts.c
index b57581f092..d0a8a433ef 100644
--- a/src/mainboard/asus/am1i-a/buildOpts.c
+++ b/src/mainboard/asus/am1i-a/buildOpts.c
@@ -218,33 +218,6 @@
// #define BLDCFG_FCH_GPP_PORT2_HOTPLUG FALSE
// #define BLDCFG_FCH_GPP_PORT3_HOTPLUG FALSE
-/* MEMORY_BUS_SPEED */
-//#define DDR400_FREQUENCY 200 ///< DDR 400
-//#define DDR533_FREQUENCY 266 ///< DDR 533
-//#define DDR667_FREQUENCY 333 ///< DDR 667
-//#define DDR800_FREQUENCY 400 ///< DDR 800
-//#define DDR1066_FREQUENCY 533 ///< DDR 1066
-//#define DDR1333_FREQUENCY 667 ///< DDR 1333
-//#define DDR1600_FREQUENCY 800 ///< DDR 1600
-//#define DDR1866_FREQUENCY 933 ///< DDR 1866
-//#define DDR2100_FREQUENCY 1050 ///< DDR 2100
-//#define DDR2133_FREQUENCY 1066 ///< DDR 2133
-//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
-//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
-//
-///* QUANDRANK_TYPE */
-//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
-//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
-//
-///* USER_MEMORY_TIMING_MODE */
-//#define TIMING_MODE_AUTO 0 ///< Use best rate possible
-//#define TIMING_MODE_LIMITED 1 ///< Set user top limit
-//#define TIMING_MODE_SPECIFIC 2 ///< Set user specified speed
-//
-///* POWER_DOWN_MODE */
-//#define POWER_DOWN_BY_CHANNEL 0 ///< Channel power down mode
-//#define POWER_DOWN_BY_CHIP_SELECT 1 ///< Chip select power down mode
-
/*
* Agesa optional capabilities selection.
* Uncomment and mark FALSE those features you wish to include in the build.
diff --git a/src/mainboard/asus/f2a85-m/buildOpts.c b/src/mainboard/asus/f2a85-m/buildOpts.c
index 13f2bd80af..65731aae86 100644
--- a/src/mainboard/asus/f2a85-m/buildOpts.c
+++ b/src/mainboard/asus/f2a85-m/buildOpts.c
@@ -207,33 +207,6 @@
// #define BLDCFG_FCH_GPP_PORT2_HOTPLUG FALSE
// #define BLDCFG_FCH_GPP_PORT3_HOTPLUG FALSE
-/* MEMORY_BUS_SPEED */
-#define DDR400_FREQUENCY 200 ///< DDR 400
-#define DDR533_FREQUENCY 266 ///< DDR 533
-#define DDR667_FREQUENCY 333 ///< DDR 667
-#define DDR800_FREQUENCY 400 ///< DDR 800
-#define DDR1066_FREQUENCY 533 ///< DDR 1066
-#define DDR1333_FREQUENCY 667 ///< DDR 1333
-#define DDR1600_FREQUENCY 800 ///< DDR 1600
-#define DDR1866_FREQUENCY 933 ///< DDR 1866
-#define DDR2100_FREQUENCY 1050 ///< DDR 2100
-#define DDR2133_FREQUENCY 1066 ///< DDR 2133
-#define DDR2400_FREQUENCY 1200 ///< DDR 2400
-#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
-
-/* QUANDRANK_TYPE */
-#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
-#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
-
-/* USER_MEMORY_TIMING_MODE */
-#define TIMING_MODE_AUTO 0 ///< Use best rate possible
-#define TIMING_MODE_LIMITED 1 ///< Set user top limit
-#define TIMING_MODE_SPECIFIC 2 ///< Set user specified speed
-
-/* POWER_DOWN_MODE */
-#define POWER_DOWN_BY_CHANNEL 0 ///< Channel power down mode
-#define POWER_DOWN_BY_CHIP_SELECT 1 ///< Chip select power down mode
-
/*
* Agesa optional capabilities selection.
* Uncomment and mark FALSE those features you wish to include in the build.