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-rw-r--r--src/mainboard/asus/a8v-e_deluxe/Kconfig4
-rw-r--r--src/mainboard/asus/a8v-e_deluxe/romstage.c3
-rw-r--r--src/mainboard/asus/a8v-e_se/Kconfig4
-rw-r--r--src/mainboard/asus/a8v-e_se/romstage.c3
-rw-r--r--src/mainboard/asus/k8v-x/Kconfig4
-rw-r--r--src/mainboard/asus/k8v-x/romstage.c3
-rw-r--r--src/mainboard/asus/m2n-e/Kconfig4
-rw-r--r--src/mainboard/asus/m2n-e/romstage.c3
-rw-r--r--src/mainboard/asus/m2v-mx_se/Kconfig4
-rw-r--r--src/mainboard/asus/m2v-mx_se/romstage.c3
-rw-r--r--src/mainboard/asus/m2v/Kconfig4
-rw-r--r--src/mainboard/asus/m2v/romstage.c3
-rw-r--r--src/mainboard/asus/m4a78-em/romstage.c2
-rw-r--r--src/mainboard/asus/m4a785-m/romstage.c2
-rw-r--r--src/mainboard/asus/m5a88-v/romstage.c2
15 files changed, 9 insertions, 39 deletions
diff --git a/src/mainboard/asus/a8v-e_deluxe/Kconfig b/src/mainboard/asus/a8v-e_deluxe/Kconfig
index 96260bc0c0..1f0d2e9175 100644
--- a/src/mainboard/asus/a8v-e_deluxe/Kconfig
+++ b/src/mainboard/asus/a8v-e_deluxe/Kconfig
@@ -31,10 +31,6 @@ config DCACHE_RAM_SIZE
hex
default 0x4000
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x1000
-
config APIC_ID_OFFSET
hex
default 0x10
diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c
index 3c4f640b6a..1f8da48258 100644
--- a/src/mainboard/asus/a8v-e_deluxe/romstage.c
+++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c
@@ -153,8 +153,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
};
unsigned bsp_apicid = 0;
int needs_reset = 0;
- struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
- + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = &sysinfo_car;
sio_init();
w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/asus/a8v-e_se/Kconfig b/src/mainboard/asus/a8v-e_se/Kconfig
index 80efbf62c8..8159a432d6 100644
--- a/src/mainboard/asus/a8v-e_se/Kconfig
+++ b/src/mainboard/asus/a8v-e_se/Kconfig
@@ -31,10 +31,6 @@ config DCACHE_RAM_SIZE
hex
default 0x4000
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x1000
-
config APIC_ID_OFFSET
hex
default 0x10
diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c
index 014c5b03cd..c78e63ee4e 100644
--- a/src/mainboard/asus/a8v-e_se/romstage.c
+++ b/src/mainboard/asus/a8v-e_se/romstage.c
@@ -153,8 +153,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
};
unsigned bsp_apicid = 0;
int needs_reset = 0;
- struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
- + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = &sysinfo_car;
sio_init();
w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/asus/k8v-x/Kconfig b/src/mainboard/asus/k8v-x/Kconfig
index ff11218188..28c2c81642 100644
--- a/src/mainboard/asus/k8v-x/Kconfig
+++ b/src/mainboard/asus/k8v-x/Kconfig
@@ -30,10 +30,6 @@ config DCACHE_RAM_SIZE
hex
default 0x4000
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x1000
-
config APIC_ID_OFFSET
hex
default 0x10
diff --git a/src/mainboard/asus/k8v-x/romstage.c b/src/mainboard/asus/k8v-x/romstage.c
index a0963da3e8..18e840c3f1 100644
--- a/src/mainboard/asus/k8v-x/romstage.c
+++ b/src/mainboard/asus/k8v-x/romstage.c
@@ -124,8 +124,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
};
unsigned bsp_apicid = 0;
int needs_reset = 0;
- struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
- + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = &sysinfo_car;
sio_init();
w83697hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/asus/m2n-e/Kconfig b/src/mainboard/asus/m2n-e/Kconfig
index 08b06803e5..088b6bf9b7 100644
--- a/src/mainboard/asus/m2n-e/Kconfig
+++ b/src/mainboard/asus/m2n-e/Kconfig
@@ -52,10 +52,6 @@ config DCACHE_RAM_SIZE
hex
default 0x08000
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
-
config APIC_ID_OFFSET
hex
default 0x10
diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c
index aedd5cdb4a..601f542ab5 100644
--- a/src/mainboard/asus/m2n-e/romstage.c
+++ b/src/mainboard/asus/m2n-e/romstage.c
@@ -98,8 +98,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
DIMM1, DIMM3, 0, 0, /* Channel B (DIMM_B1, DIMM_B2) */
};
- struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
- + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = &sysinfo_car;
int needs_reset = 0;
unsigned bsp_apicid = 0;
diff --git a/src/mainboard/asus/m2v-mx_se/Kconfig b/src/mainboard/asus/m2v-mx_se/Kconfig
index 0ee9058f44..8a3a69877e 100644
--- a/src/mainboard/asus/m2v-mx_se/Kconfig
+++ b/src/mainboard/asus/m2v-mx_se/Kconfig
@@ -50,10 +50,6 @@ config DCACHE_RAM_SIZE
hex
default 0x4000
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
-
config APIC_ID_OFFSET
hex
default 0x10
diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c
index 681ffcb2ec..0ccec58b60 100644
--- a/src/mainboard/asus/m2v-mx_se/romstage.c
+++ b/src/mainboard/asus/m2v-mx_se/romstage.c
@@ -132,8 +132,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
};
unsigned bsp_apicid = 0;
int needs_reset = 0;
- struct sys_info *sysinfo =
- (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = &sysinfo_car;
it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
it8712f_kill_watchdog();
diff --git a/src/mainboard/asus/m2v/Kconfig b/src/mainboard/asus/m2v/Kconfig
index 731e0de079..61ffd9abbe 100644
--- a/src/mainboard/asus/m2v/Kconfig
+++ b/src/mainboard/asus/m2v/Kconfig
@@ -35,10 +35,6 @@ config DCACHE_RAM_SIZE
hex
default 0x4000
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x1000
-
config APIC_ID_OFFSET
hex
default 0x10
diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c
index db6d2c80b3..451cb33ec3 100644
--- a/src/mainboard/asus/m2v/romstage.c
+++ b/src/mainboard/asus/m2v/romstage.c
@@ -230,8 +230,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
};
unsigned bsp_apicid = 0;
int needs_reset = 0;
- struct sys_info *sysinfo =
- (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = &sysinfo_car;
it8712f_24mhz_clkin();
it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c
index 50bbfcac06..07c2de36e4 100644
--- a/src/mainboard/asus/m4a78-em/romstage.c
+++ b/src/mainboard/asus/m4a78-em/romstage.c
@@ -76,7 +76,7 @@ static int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = &sysinfo_car;
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c
index 1fe7b49512..10aa14a67e 100644
--- a/src/mainboard/asus/m4a785-m/romstage.c
+++ b/src/mainboard/asus/m4a785-m/romstage.c
@@ -76,7 +76,7 @@ static int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = &sysinfo_car;
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c
index 22d87b37bc..9884dc2180 100644
--- a/src/mainboard/asus/m5a88-v/romstage.c
+++ b/src/mainboard/asus/m5a88-v/romstage.c
@@ -85,7 +85,7 @@ void soft_reset(void)
#define SERIAL_DEV PNP_DEV(0x4e, IT8721F_SP1)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = &sysinfo_car;
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;