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-rw-r--r--src/mainboard/avalue/eax-785e/mainboard.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/avalue/eax-785e/mainboard.c b/src/mainboard/avalue/eax-785e/mainboard.c
index dc1a1431d3..b09a3fa299 100644
--- a/src/mainboard/avalue/eax-785e/mainboard.c
+++ b/src/mainboard/avalue/eax-785e/mainboard.c
@@ -19,6 +19,7 @@
#include <arch/io.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
+#include <southbridge/amd/common/amd_defs.h>
#include <device/pci_def.h>
u8 is_dev3_present(void);
@@ -34,12 +35,12 @@ void enable_int_gfx(void)
/* make sure the Acpi MMIO(fed80000) is accessible */
// FIXME: RWPMIO(SB_PMIOA_REG24, AccWidthUint8, ~(BIT0), BIT0);
- gpio_reg = (volatile u8 *)0xFED80000 + 0xD00; /* IoMux Register */
+ gpio_reg = (volatile u8 *)AMD_SB_ACPI_MMIO_ADDR + 0xD00; /* IoMux Register */
*(gpio_reg + 0x6) = 0x1; /* Int_vga_en */
*(gpio_reg + 170) = 0x1; /* gpio_gate */
- gpio_reg = (volatile u8 *)0xFED80000 + 0x100; /* GPIO Registers */
+ gpio_reg = (volatile u8 *)AMD_SB_ACPI_MMIO_ADDR + 0x100; /* GPIO Registers */
*(gpio_reg + 0x6) = 0x8;
*(gpio_reg + 170) = 0x0;