diff options
Diffstat (limited to 'src/mainboard/dell/latitude_e6230/devicetree.cb')
-rw-r--r-- | src/mainboard/dell/latitude_e6230/devicetree.cb | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/src/mainboard/dell/latitude_e6230/devicetree.cb b/src/mainboard/dell/latitude_e6230/devicetree.cb new file mode 100644 index 0000000000..77c51ef480 --- /dev/null +++ b/src/mainboard/dell/latitude_e6230/devicetree.cb @@ -0,0 +1,115 @@ +chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did + register "gfx" = "GMA_STATIC_DISPLAYS(1)" + register "gpu_cpu_backlight" = "0x000009e9" + register "gpu_dp_b_hotplug" = "4" + register "gpu_dp_c_hotplug" = "4" + register "gpu_dp_d_hotplug" = "4" + register "gpu_panel_port_select" = "0" + register "gpu_panel_power_backlight_off_delay" = "2300" + register "gpu_panel_power_backlight_on_delay" = "2300" + register "gpu_panel_power_cycle_delay" = "6" + register "gpu_panel_power_down_delay" = "400" + register "gpu_panel_power_up_delay" = "400" + register "gpu_pch_backlight" = "0x13121312" + device cpu_cluster 0x0 on + chip cpu/intel/model_206ax + device lapic 0x0 on end + device lapic 0xacac off end + + register "c1_acpower" = "1" + register "c1_battery" = "1" + register "c2_acpower" = "3" + register "c2_battery" = "3" + register "c3_acpower" = "5" + register "c3_battery" = "5" + end + end + device domain 0x0 on + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + register "c2_latency" = "0x0065" + register "docking_supported" = "1" + register "gen1_dec" = "0x007c0681" + register "gen2_dec" = "0x005c0921" + register "gen3_dec" = "0x003c07e1" + register "gen4_dec" = "0x00000000" + register "gpi0_routing" = "2" + register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }" + register "pcie_port_coalesce" = "1" + register "sata_interface_speed_support" = "0x3" + register "sata_port_map" = "0x31" + register "spi_lvscc" = "0x2005" + register "spi_uvscc" = "0x2005" + register "superspeed_capable_ports" = "0x0000000f" + register "xhci_overcurrent_mapping" = "0x00000c03" + register "xhci_switchable_ports" = "0x0000000f" + device pci 14.0 on # USB 3.0 Controller + subsystemid 0x1028 0x0532 + end + device pci 16.0 on # Management Engine Interface 1 + subsystemid 0x1028 0x0532 + end + device pci 16.1 off # Management Engine Interface 2 + end + device pci 16.2 off # Management Engine IDE-R + end + device pci 16.3 off # Management Engine KT + end + device pci 19.0 on # Intel Gigabit Ethernet + subsystemid 0x1028 0x0532 + end + device pci 1a.0 on # USB2 EHCI #2 + subsystemid 0x1028 0x0532 + end + device pci 1b.0 on # High Definition Audio Audio controller + subsystemid 0x1028 0x0532 + end + device pci 1c.0 on # PCIe Port #1 + subsystemid 0x1028 0x0532 + end + device pci 1c.1 on # PCIe Port #2 + subsystemid 0x1028 0x0532 + end + device pci 1c.2 on # PCIe Port #3 + subsystemid 0x1028 0x0532 + end + device pci 1c.3 on # PCIe Port #4 + subsystemid 0x1028 0x0532 + end + device pci 1c.4 off # PCIe Port #5 + end + device pci 1c.5 on # PCIe Port #6 + subsystemid 0x1028 0x0532 + end + device pci 1c.6 off # PCIe Port #7 + end + device pci 1c.7 off # PCIe Port #8 + end + device pci 1d.0 on # USB2 EHCI #1 + subsystemid 0x1028 0x0532 + end + device pci 1e.0 off # PCI bridge + end + device pci 1f.0 on # LPC bridge PCI-LPC bridge + subsystemid 0x1028 0x0532 + end + device pci 1f.2 on # SATA Controller 1 + subsystemid 0x1028 0x0532 + end + device pci 1f.3 on # SMBus + subsystemid 0x1028 0x0532 + end + device pci 1f.5 off # SATA Controller 2 + end + device pci 1f.6 off # Thermal + end + end + device pci 00.0 on # Host bridge Host bridge + subsystemid 0x1028 0x0532 + end + device pci 01.0 off # PCIe Bridge for discrete graphics + end + device pci 02.0 on # Internal graphics VGA controller + subsystemid 0x1028 0x0532 + end + end +end |