summaryrefslogtreecommitdiff
path: root/src/mainboard/digitallogic
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/digitallogic')
-rw-r--r--src/mainboard/digitallogic/adl855pc/Kconfig2
-rw-r--r--src/mainboard/digitallogic/adl855pc/devicetree.cb2
-rw-r--r--src/mainboard/digitallogic/adl855pc/romstage.c3
3 files changed, 4 insertions, 3 deletions
diff --git a/src/mainboard/digitallogic/adl855pc/Kconfig b/src/mainboard/digitallogic/adl855pc/Kconfig
index fd109e9d64..58b9f6f034 100644
--- a/src/mainboard/digitallogic/adl855pc/Kconfig
+++ b/src/mainboard/digitallogic/adl855pc/Kconfig
@@ -3,7 +3,7 @@ config BOARD_DIGITALLOGIC_ADL855PC
select ARCH_X86
select CPU_INTEL_SOCKET_MPGA479M
select NORTHBRIDGE_INTEL_I855
- select SOUTHBRIDGE_INTEL_I82801DBM
+ select SOUTHBRIDGE_INTEL_I82801DX
select SUPERIO_WINBOND_W83627HF
select ROMCC
select HAVE_PIRQ_TABLE
diff --git a/src/mainboard/digitallogic/adl855pc/devicetree.cb b/src/mainboard/digitallogic/adl855pc/devicetree.cb
index 0f600ac8f1..6846b4e59c 100644
--- a/src/mainboard/digitallogic/adl855pc/devicetree.cb
+++ b/src/mainboard/digitallogic/adl855pc/devicetree.cb
@@ -2,7 +2,7 @@ chip northbridge/intel/i855
device pci_domain 0 on
device pci 0.0 on end
device pci 1.0 on end
- chip southbridge/intel/i82801dbm
+ chip southbridge/intel/i82801dx
# pci 11.0 on end
# pci 11.1 on end
# pci 11.2 on end
diff --git a/src/mainboard/digitallogic/adl855pc/romstage.c b/src/mainboard/digitallogic/adl855pc/romstage.c
index 16d9195d38..8903876057 100644
--- a/src/mainboard/digitallogic/adl855pc/romstage.c
+++ b/src/mainboard/digitallogic/adl855pc/romstage.c
@@ -16,7 +16,8 @@
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "lib/ramtest.c"
-#include "southbridge/intel/i82801dbm/i82801dbm_early_smbus.c"
+#include "southbridge/intel/i82801dx/i82801dx.h"
+#include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"
#include "northbridge/intel/i855/raminit.h"
#if 0