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-rw-r--r--src/mainboard/digitallogic/adl855pc/Config.lb129
-rw-r--r--src/mainboard/digitallogic/adl855pc/auto.c25
-rw-r--r--src/mainboard/digitallogic/adl855pc/chip.h2
-rw-r--r--src/mainboard/digitallogic/adl855pc/failover.c37
-rw-r--r--src/mainboard/digitallogic/adl855pc/mainboard.c30
5 files changed, 60 insertions, 163 deletions
diff --git a/src/mainboard/digitallogic/adl855pc/Config.lb b/src/mainboard/digitallogic/adl855pc/Config.lb
index 9871632bfb..2564eeff2b 100644
--- a/src/mainboard/digitallogic/adl855pc/Config.lb
+++ b/src/mainboard/digitallogic/adl855pc/Config.lb
@@ -1,86 +1,3 @@
-uses HAVE_MP_TABLE
-uses HAVE_PIRQ_TABLE
-uses USE_FALLBACK_IMAGE
-uses HAVE_FALLBACK_BOOT
-uses HAVE_HARD_RESET
-uses HAVE_OPTION_TABLE
-uses USE_OPTION_TABLE
-uses CONFIG_ROM_STREAM
-uses IRQ_SLOT_COUNT
-uses MAINBOARD
-uses ARCH
-uses FALLBACK_SIZE
-uses STACK_SIZE
-uses HEAP_SIZE
-uses ROM_SIZE
-uses ROM_SECTION_SIZE
-uses ROM_IMAGE_SIZE
-uses ROM_SECTION_SIZE
-uses ROM_SECTION_OFFSET
-uses CONFIG_ROM_STREAM_START
-uses PAYLOAD_SIZE
-uses _ROMBASE
-uses XIP_ROM_SIZE
-uses XIP_ROM_BASE
-uses HAVE_MP_TABLE
-
-## ROM_SIZE is the size of boot ROM that this board will use.
-default ROM_SIZE = 256*1024
-
-###
-### Build options
-###
-
-##
-## Build code for the fallback boot
-##
-default HAVE_FALLBACK_BOOT=1
-
-##
-## no MP table
-##
-default HAVE_MP_TABLE=0
-
-##
-## Build code to reset the motherboard from linuxBIOS
-##
-default HAVE_HARD_RESET=1
-
-##
-## Build code to export a programmable irq routing table
-##
-default HAVE_PIRQ_TABLE=1
-default IRQ_SLOT_COUNT=5
-object irq_tables.o
-
-##
-## Build code to export a CMOS option table
-##
-default HAVE_OPTION_TABLE=1
-
-###
-### LinuxBIOS layout values
-###
-
-## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
-default ROM_IMAGE_SIZE = 65536
-
-##
-## Use a small 8K stack
-##
-default STACK_SIZE=0x2000
-
-##
-## Use a small 16K heap
-##
-default HEAP_SIZE=0x4000
-
-##
-## Only use the option table in a normal image
-##
-#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
-default USE_OPTION_TABLE = 0
-
##
## Compute the location and size of where this firmware image
## (linuxBIOS plus bootloader) will live in the boot rom chip.
@@ -99,7 +16,6 @@ end
##
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
-default CONFIG_ROM_STREAM = 1
##
## Compute where this copy of linuxBIOS will start in the boot rom
@@ -126,49 +42,49 @@ arch i386 end
## Build the objects we have code for in this directory.
##
-
driver mainboard.o
+if HAVE_PIRQ_TABLE object irq_tables.o end
#object reset.o
##
## Romcc output
##
makerule ./failover.E
- depends "$(MAINBOARD)/failover.c"
- action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E"
+ depends "$(MAINBOARD)/failover.c ./romcc"
+ action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
end
makerule ./failover.inc
- depends "./failover.E ./romcc"
- action "./romcc -O -mcpu=p4 -o failover.inc --label-prefix=failover ./failover.E"
+ depends "$(MAINBOARD)/failover.c ./romcc"
+ action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
end
makerule ./auto.E
- depends "$(MAINBOARD)/auto.c"
- action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E"
+ depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
+ action "./romcc -E -mcpu=p3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
end
makerule ./auto.inc
- depends "./auto.E ./romcc"
- action "./romcc -O -mcpu=p4 ./auto.E "
+ depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
+ action "./romcc -mcpu=p3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
end
##
## Build our 16 bit and 32 bit linuxBIOS entry code
##
-mainboardinit cpu/i386/entry16.inc
-mainboardinit cpu/i386/entry32.inc
-ldscript /cpu/i386/entry16.lds
-ldscript /cpu/i386/entry32.lds
+mainboardinit cpu/x86/16bit/entry16.inc
+mainboardinit cpu/x86/32bit/entry32.inc
+ldscript /cpu/x86/16bit/entry16.lds
+ldscript /cpu/x86/32bit/entry32.lds
##
## Build our reset vector (This is where linuxBIOS is entered)
##
if USE_FALLBACK_IMAGE
- mainboardinit cpu/i386/reset16.inc
- ldscript /cpu/i386/reset16.lds
+ mainboardinit cpu/x86/16bit/reset16.inc
+ ldscript /cpu/x86/16bit/reset16.lds
else
- mainboardinit cpu/i386/reset32.inc
- ldscript /cpu/i386/reset32.lds
+ mainboardinit cpu/x86/32bit/reset32.inc
+ ldscript /cpu/x86/32bit/reset32.lds
end
### Should this be in the northbridge code?
@@ -180,11 +96,6 @@ mainboardinit arch/i386/lib/cpu_reset.inc
mainboardinit arch/i386/lib/id.inc
ldscript /arch/i386/lib/id.lds
-##
-## Setup our mtrrs
-##
-# mainboardinit cpu/p6/earlymtrr.inc
-
###
### This is the early phase of linuxBIOS startup
### Things are delicate and we test to see if we should
@@ -203,7 +114,7 @@ end
## Setup RAM
##
mainboardinit cpu/x86/fpu/enable_fpu.inc
-mainboardinit cpu/x86/mmx/emable_mmx.inc
+mainboardinit cpu/x86/mmx/enable_mmx.inc
mainboardinit cpu/x86/sse/enable_sse.inc
mainboardinit ./auto.inc
mainboardinit cpu/x86/sse/disable_sse.inc
@@ -273,8 +184,8 @@ chip northbridge/intel/i855pm
end
end
device apic_cluster 0 on
- device cpu/intel/socket_mPGA479M
- apic 0
+ chip cpu/intel/socket_mPGA479M
+ device apic 0 on end
end
end
end
diff --git a/src/mainboard/digitallogic/adl855pc/auto.c b/src/mainboard/digitallogic/adl855pc/auto.c
index f2e183615b..1af77f4504 100644
--- a/src/mainboard/digitallogic/adl855pc/auto.c
+++ b/src/mainboard/digitallogic/adl855pc/auto.c
@@ -5,7 +5,10 @@
#include <arch/io.h>
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
+#if 0
#include <arch/smp/lapic.h>
+#endif
+#include <arch/hlt.h>
//#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
@@ -14,16 +17,16 @@
#include "southbridge/intel/i82801dbm/i82801dbm_early_smbus.c"
#include "northbridge/intel/i855pm/raminit.h"
-#if 1
+#if 0
#include "cpu/p6/apic_timer.c"
#include "lib/delay.c"
#endif
-#include "cpu/p6/boot_cpu.c"
+#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/intel/i855pm/debug.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-
-#include "cpu/p6/earlymtrr.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
+#include "cpu/x86/bist.h"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
@@ -57,7 +60,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/intel/i855pm/reset_test.c"
#include "sdram/generic_sdram.c"
-static void main(void)
+static void main(unsigned long bist)
{
static const struct mem_controller memctrl[] = {
{
@@ -66,15 +69,21 @@ static void main(void)
},
};
-#if 1
- enable_lapic();
- init_timer();
+ if (bist == 0) {
+ early_mtrr_init();
+#if 0
+ enable_lapic();
+ init_timer();
#endif
+ }
w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
uart_init();
console_init();
+ /* Halt if there was a built in self test failure */
+ report_bist_failure(bist);
+
#if 0
print_pci_devices();
#endif
diff --git a/src/mainboard/digitallogic/adl855pc/chip.h b/src/mainboard/digitallogic/adl855pc/chip.h
index e660951a9b..0ed8089561 100644
--- a/src/mainboard/digitallogic/adl855pc/chip.h
+++ b/src/mainboard/digitallogic/adl855pc/chip.h
@@ -1,4 +1,4 @@
-extern struct chip_operations mainboard_digitallogic_adl855pc_control;
+extern struct chip_operations mainboard_digitallogic_adl855pc_ops;
struct mainboard_digitallogic_adl855pc_config {
int nothing;
diff --git a/src/mainboard/digitallogic/adl855pc/failover.c b/src/mainboard/digitallogic/adl855pc/failover.c
index bd0df4e89d..bdcb9eaed2 100644
--- a/src/mainboard/digitallogic/adl855pc/failover.c
+++ b/src/mainboard/digitallogic/adl855pc/failover.c
@@ -5,25 +5,28 @@
#include <arch/io.h>
#include "arch/romcc_io.h"
#include "pc80/mc146818rtc_early.c"
-#include "cpu/p6/boot_cpu.c"
-static void main(void)
+static unsigned long main(unsigned long bist)
{
- /* for now, just always assume failure */
-
-#if 0
- /* Is this a cpu reset? */
- if (cpu_init_detected()) {
- if (last_boot_normal()) {
- asm("jmp __normal_image");
- } else {
- asm("jmp __cpu_reset");
- }
- }
-
/* This is the primary cpu how should I boot? */
- else if (do_normal_boot()) {
- asm("jmp __normal_image");
+ if (do_normal_boot()) {
+ goto normal_image;
+ }
+ else {
+ goto fallback_image;
}
-#endif
+ normal_image:
+ asm volatile ("jmp __normal_image"
+ : /* outputs */
+ : "a" (bist) /* inputs */
+ : /* clobbers */
+ );
+ cpu_reset:
+ asm volatile ("jmp __cpu_reset"
+ : /* outputs */
+ : "a"(bist) /* inputs */
+ : /* clobbers */
+ );
+ fallback_image:
+ return bist;
}
diff --git a/src/mainboard/digitallogic/adl855pc/mainboard.c b/src/mainboard/digitallogic/adl855pc/mainboard.c
index 1ef4af1d38..a818240be1 100644
--- a/src/mainboard/digitallogic/adl855pc/mainboard.c
+++ b/src/mainboard/digitallogic/adl855pc/mainboard.c
@@ -3,35 +3,9 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-
-#include <arch/io.h>
#include "chip.h"
-static int
-mainboard_scan_bus(device_t root, int maxbus)
-{
- int retval;
- printk_spew("%s: root %p maxbus %d\n", __FUNCTION__, root, maxbus);
- retval = pci_scan_bus(root->bus, 0, 0xff, maxbus);
- printk_spew("DONE %s: return %d\n", __FUNCTION__, maxbus);
- return maxbus;
-}
-
-static struct device_operations mainboard_operations = {
- .read_resources = root_dev_read_resources,
- .set_resources = root_dev_set_resources,
- .enable_resources = root_dev_enable_resources,
- .init = root_dev_init,
- .scan_bus = mainboard_scan_bus,
- .enable = 0,
-};
-
-static void enable_dev(device_t dev)
-{
- dev->ops = &mainboard_operations;
-}
-struct chip_operations mainboard_digitallogic_adl855pc_control = {
- .enable_dev = enable_dev,
- .name = "Digital Logic ADL855PC mainboard ",
+struct chip_operations mainboard_digitallogic_adl855pc_ops = {
+ CHIP_NAME("Digital Logic ADL855PC mainboard ")
};