summaryrefslogtreecommitdiff
path: root/src/mainboard/ecs/p6iwp-fe/Kconfig
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/ecs/p6iwp-fe/Kconfig')
-rw-r--r--src/mainboard/ecs/p6iwp-fe/Kconfig52
1 files changed, 52 insertions, 0 deletions
diff --git a/src/mainboard/ecs/p6iwp-fe/Kconfig b/src/mainboard/ecs/p6iwp-fe/Kconfig
new file mode 100644
index 0000000000..d2129a8d21
--- /dev/null
+++ b/src/mainboard/ecs/p6iwp-fe/Kconfig
@@ -0,0 +1,52 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2010 Anders Jenbo <anders@jenbo.dk>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+config BOARD_ECS_P6IWP_FE
+ bool "P6IWP-FE"
+ select ARCH_X86
+ select CPU_INTEL_SOCKET_PGA370
+ select NORTHBRIDGE_INTEL_I82810
+ select SOUTHBRIDGE_INTEL_I82801AX
+ select SUPERIO_ITE_IT8712F
+ select ROMCC
+ select HAVE_PIRQ_TABLE
+ select UDELAY_TSC
+ select BOARD_ROMSIZE_KB_512
+
+config MAINBOARD_DIR
+ string
+ default ecs/p6iwp-fe
+ depends on BOARD_ECS_P6IWP_FE
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "P6IWP-FE"
+ depends on BOARD_ECS_P6IWP_FE
+
+config HAVE_OPTION_TABLE
+ bool
+ default n
+ depends on BOARD_ECS_P6IWP_FE
+
+config IRQ_SLOT_COUNT
+ int
+ default 10
+ depends on BOARD_ECS_P6IWP_FE
+