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-rw-r--r--src/mainboard/getac/p470/acpi/ec.asl8
-rw-r--r--src/mainboard/getac/p470/acpi/i945_pci_irqs.asl2
-rw-r--r--src/mainboard/getac/p470/acpi/ich7_pci_irqs.asl2
-rw-r--r--src/mainboard/getac/p470/acpi/mainboard.asl2
-rw-r--r--src/mainboard/getac/p470/acpi/platform.asl10
-rw-r--r--src/mainboard/getac/p470/acpi/superio.asl8
-rw-r--r--src/mainboard/getac/p470/acpi/thermal.asl2
-rw-r--r--src/mainboard/getac/p470/cmos.layout2
-rw-r--r--src/mainboard/getac/p470/devicetree.cb8
-rw-r--r--src/mainboard/getac/p470/dsdt.asl2
10 files changed, 23 insertions, 23 deletions
diff --git a/src/mainboard/getac/p470/acpi/ec.asl b/src/mainboard/getac/p470/acpi/ec.asl
index 6538b83eeb..70faab2836 100644
--- a/src/mainboard/getac/p470/acpi/ec.asl
+++ b/src/mainboard/getac/p470/acpi/ec.asl
@@ -151,7 +151,7 @@ Device(EC0)
TRAP(0xc1)
}
}
-
+
Method (_Q09, 0)
{
Notify(BAT0, 0x80)
@@ -162,7 +162,7 @@ Device(EC0)
{
Notify(\_TZ.THRM, 0x80)
}
-
+
Method (_Q20, 0)
{
Notify(\_SB.ECO, 0x81)
@@ -668,8 +668,8 @@ Scope(\_SB)
}
Return (0)
}
-
-
+
+
}
}
diff --git a/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl b/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl
index c78d7d6248..b84acd921f 100644
--- a/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl
+++ b/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl
@@ -19,7 +19,7 @@
* MA 02110-1301 USA
*/
-/* This is board specific information: IRQ routing for the
+/* This is board specific information: IRQ routing for the
* i945
*/
diff --git a/src/mainboard/getac/p470/acpi/ich7_pci_irqs.asl b/src/mainboard/getac/p470/acpi/ich7_pci_irqs.asl
index 28b06a1e3e..d9fba6b8c6 100644
--- a/src/mainboard/getac/p470/acpi/ich7_pci_irqs.asl
+++ b/src/mainboard/getac/p470/acpi/ich7_pci_irqs.asl
@@ -19,7 +19,7 @@
* MA 02110-1301 USA
*/
-/* This is board specific information: IRQ routing for the
+/* This is board specific information: IRQ routing for the
* 0:1e.0 PCI bridge of the ICH7
*/
diff --git a/src/mainboard/getac/p470/acpi/mainboard.asl b/src/mainboard/getac/p470/acpi/mainboard.asl
index 88ff8b4ea7..396d8d8b0d 100644
--- a/src/mainboard/getac/p470/acpi/mainboard.asl
+++ b/src/mainboard/getac/p470/acpi/mainboard.asl
@@ -40,7 +40,7 @@ Device (SLPB)
Device (PWRB)
{
Name(_HID, EisaId("PNP0C0C"))
-
+
// Wake
Name(_PRW, Package(){0x1d, 0x04})
}
diff --git a/src/mainboard/getac/p470/acpi/platform.asl b/src/mainboard/getac/p470/acpi/platform.asl
index eeaded838f..01de2e4842 100644
--- a/src/mainboard/getac/p470/acpi/platform.asl
+++ b/src/mainboard/getac/p470/acpi/platform.asl
@@ -53,9 +53,9 @@ Field(SMI1, AnyAcc, NoLock, Preserve)
INFO, 1024
}
-/* The _PIC method is called by the OS to choose between interrupt
+/* The _PIC method is called by the OS to choose between interrupt
* routing via the i8259 interrupt controller or the APIC.
- *
+ *
* _PIC is called with a parameter of 0 for i8259 configuration and
* with a parameter of 1 for Local Apic/IOAPIC configuration.
*/
@@ -119,7 +119,7 @@ Method(_WAK,1)
// Notify PCI Express slots in case a card
// was inserted while a sleep state was active.
-
+
If (LEqual(RP1D, 0)) {
Notify(\_SB.PCI0.RP01, 0)
}
@@ -132,13 +132,13 @@ Method(_WAK,1)
Notify(\_SB.PCI0.RP04, 0)
}
- // Are we coming from S3?
+ // Are we coming from S3?
If (LEqual(Arg0, 3)) {
TRAP(0xeb)
TRAP(0x46)
}
- // Are we coming from S4?
+ // Are we coming from S4?
If (LEqual(Arg0, 4)) {
Notify(SLPB, 0x02)
If (DTSE) {
diff --git a/src/mainboard/getac/p470/acpi/superio.asl b/src/mainboard/getac/p470/acpi/superio.asl
index e84c204d98..6614016f5f 100644
--- a/src/mainboard/getac/p470/acpi/superio.asl
+++ b/src/mainboard/getac/p470/acpi/superio.asl
@@ -136,7 +136,7 @@ Device (SIO1)
CreateByteField(RSRC, 0x05, IORH) // Why?
CreateByteField(RSRC,
\_SB.PCI0.LPCB.SIO1.UAR1._CRS._IRA._INT, IRQL)
-
+
Store (READ(0, 0x24, 0xff), Local0)
And (Local0, 0xc0, Local1)
ShiftRight(Local1, 0x06, Local1)
@@ -291,7 +291,7 @@ Device (SIO1)
CreateByteField(RSRC, 0x05, IORH)
CreateByteField(RSRC,
\_SB.PCI0.LPCB.SIO1.UAR2._CRS._IRB._INT, IRQL)
-
+
Store (READ(0, 0x25, 0xff), Local0)
And (Local0, 0xc0, Local1)
ShiftRight(Local1, 0x06, Local1)
@@ -445,7 +445,7 @@ Device (SIO1)
CreateByteField(RSRC, 0x05, IORH) // Why?
CreateByteField(RSRC,
\_SB.PCI0.LPCB.SIO1.UAR3._CRS._IRA._INT, IRQL)
-
+
Store (READ(0, 0x1b, 0xff), Local0)
And (Local0, 0xc0, Local1)
ShiftRight(Local1, 0x06, Local1)
@@ -597,7 +597,7 @@ Device (SIO1)
CreateByteField(RSRC, 0x05, IORH) // Why?
CreateByteField(RSRC,
\_SB.PCI0.LPCB.SIO1.UAR4._CRS._IRA._INT, IRQL)
-
+
Store (READ(0, 0x1c, 0xff), Local0)
And (Local0, 0xc0, Local1)
ShiftRight(Local1, 0x06, Local1)
diff --git a/src/mainboard/getac/p470/acpi/thermal.asl b/src/mainboard/getac/p470/acpi/thermal.asl
index 93bdbcfe66..e5ea75e191 100644
--- a/src/mainboard/getac/p470/acpi/thermal.asl
+++ b/src/mainboard/getac/p470/acpi/thermal.asl
@@ -26,7 +26,7 @@ Scope (\_TZ)
ThermalZone (THRM)
{
// TODO These could/should be read from the
- // GNVS area, so they can be controlled by
+ // GNVS area, so they can be controlled by
// coreboot
Name(TC1V, 0x00)
Name(TC2V, 0x0a)
diff --git a/src/mainboard/getac/p470/cmos.layout b/src/mainboard/getac/p470/cmos.layout
index 130f1cefc6..c8790789b8 100644
--- a/src/mainboard/getac/p470/cmos.layout
+++ b/src/mainboard/getac/p470/cmos.layout
@@ -1,6 +1,6 @@
#
# This file is part of the coreboot project.
-#
+#
# Copyright (C) 2007-2008 coresystems GmbH
#
# This program is free software; you can redistribute it and/or
diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb
index 9b376c79cf..bdd959edde 100644
--- a/src/mainboard/getac/p470/devicetree.cb
+++ b/src/mainboard/getac/p470/devicetree.cb
@@ -1,6 +1,6 @@
##
## This file is part of the coreboot project.
-##
+##
## Copyright (C) 2007-2009 coresystems GmbH
##
## This program is free software; you can redistribute it and/or
@@ -27,7 +27,7 @@ chip northbridge/intel/i945
end
end
- device pci_domain 0 on
+ device pci_domain 0 on
device pci 00.0 on end # host bridge
# autodetect:
#device pci 01.0 off end # i945 PCIe root port
@@ -74,10 +74,10 @@ chip northbridge/intel/i945
device pci 1d.7 on end # USB2 EHCI
device pci 1e.0 on
chip southbridge/ti/pcixx12
-
+
end
end # PCI bridge
- #device pci 1e.2 off end # AC'97 Audio
+ #device pci 1e.2 off end # AC'97 Audio
#device pci 1e.3 off end # AC'97 Modem
device pci 1f.0 on # LPC bridge
chip superio/smsc/fdc37n972
diff --git a/src/mainboard/getac/p470/dsdt.asl b/src/mainboard/getac/p470/dsdt.asl
index f6c6cf785d..9728ea260c 100644
--- a/src/mainboard/getac/p470/dsdt.asl
+++ b/src/mainboard/getac/p470/dsdt.asl
@@ -42,7 +42,7 @@ DefinitionBlock(
// mainboard specific devices
#include "acpi/mainboard.asl"
-
+
// Thermal Zone
#include "acpi/thermal.asl"
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-29 12:16:17 +0000