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-rw-r--r--src/mainboard/gigabyte/ma785gm/romstage.c3
-rw-r--r--src/mainboard/gigabyte/ma785gmt/romstage.c3
-rw-r--r--src/mainboard/gigabyte/ma78gm/romstage.c3
3 files changed, 3 insertions, 6 deletions
diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c
index b578739106..98bc00fd03 100644
--- a/src/mainboard/gigabyte/ma785gm/romstage.c
+++ b/src/mainboard/gigabyte/ma785gm/romstage.c
@@ -43,7 +43,7 @@
#include <arch/early_variables.h>
#include <cbmem.h>
#include <spd.h>
-#include "southbridge/amd/rs780/early_setup.c"
+#include <southbridge/amd/rs780/rs780.h>
#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
@@ -212,7 +212,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
// die("After MCT init before CAR disabled.");
- rs780_before_pci_init();
sb7xx_51xx_before_pci_init();
post_code(0x42);
diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c
index a21cf70049..81d4c6b36b 100644
--- a/src/mainboard/gigabyte/ma785gmt/romstage.c
+++ b/src/mainboard/gigabyte/ma785gmt/romstage.c
@@ -43,7 +43,7 @@
#include <arch/early_variables.h>
#include <cbmem.h>
#include <spd.h>
-#include "southbridge/amd/rs780/early_setup.c"
+#include <southbridge/amd/rs780/rs780.h>
#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
@@ -212,7 +212,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
// die("After MCT init before CAR disabled.");
- rs780_before_pci_init();
sb7xx_51xx_before_pci_init();
post_code(0x42);
diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c
index 98d038f5a9..9f4dd441d4 100644
--- a/src/mainboard/gigabyte/ma78gm/romstage.c
+++ b/src/mainboard/gigabyte/ma78gm/romstage.c
@@ -46,7 +46,7 @@
#include <cpu/amd/family_10h-family_15h/init_cpus.h>
#include <arch/early_variables.h>
#include <cbmem.h>
-#include "southbridge/amd/rs780/early_setup.c"
+#include <southbridge/amd/rs780/rs780.h>
#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
@@ -214,7 +214,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
// die("After MCT init before CAR disabled.");
- rs780_before_pci_init();
sb7xx_51xx_before_pci_init();
post_code(0x42);