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-rw-r--r--src/mainboard/google/auron/acpi/ec.asl8
-rw-r--r--src/mainboard/google/auron/acpi/mainboard.asl14
2 files changed, 8 insertions, 14 deletions
diff --git a/src/mainboard/google/auron/acpi/ec.asl b/src/mainboard/google/auron/acpi/ec.asl
index e25cd295a3..5740c27d32 100644
--- a/src/mainboard/google/auron/acpi/ec.asl
+++ b/src/mainboard/google/auron/acpi/ec.asl
@@ -19,5 +19,13 @@
/* variant configuration */
#include <variant/acpi/ec.asl>
+/* Enable LID switch and provide wake pin for EC */
+#define EC_ENABLE_LID_SWITCH
+/*
+ * There is no GPIO for LID, the EC pulses WAKE# pin instead.
+ * There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE.
+ */
+#define EC_ENABLE_WAKE_PIN 0x69
+
/* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl>
diff --git a/src/mainboard/google/auron/acpi/mainboard.asl b/src/mainboard/google/auron/acpi/mainboard.asl
index c5b9a83219..7910b6ee3f 100644
--- a/src/mainboard/google/auron/acpi/mainboard.asl
+++ b/src/mainboard/google/auron/acpi/mainboard.asl
@@ -18,20 +18,6 @@
Scope (\_SB)
{
- Device (LID0)
- {
- Name(_HID, EisaId("PNP0C0D"))
- Method(_LID, 0)
- {
- Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
- Return (\LIDS)
- }
-
- // There is no GPIO for LID, the EC pulses WAKE# pin instead.
- // There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE
- Name (_PRW, Package(){ 0x69, 5 }) // PCI_EXP
- }
-
Device (PWRB)
{
Name(_HID, EisaId("PNP0C0C"))