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-rw-r--r--src/mainboard/google/beltino/romstage.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c
index 4218393c17..54960928d0 100644
--- a/src/mainboard/google/beltino/romstage.c
+++ b/src/mainboard/google/beltino/romstage.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <stdint.h>
-#include <arch/romstage.h>
#include <cpu/intel/haswell/haswell.h>
#include <northbridge/intel/haswell/haswell.h>
#include <northbridge/intel/haswell/raminit.h>
@@ -43,9 +42,9 @@ void mainboard_config_rcba(void)
RCBA16(D23IR) = DIR_ROUTE(PIRQH, PIRQH, PIRQH, PIRQH); /* SDIO */
}
-void mainboard_romstage_entry(void)
+void mainboard_fill_pei_data(struct pei_data *pei_data)
{
- struct pei_data pei_data = {
+ struct pei_data mainboard_pei_data = {
.pei_version = PEI_VERSION,
.mchbar = (uintptr_t)DEFAULT_MCHBAR,
.dmibar = (uintptr_t)DEFAULT_DMIBAR,
@@ -100,6 +99,5 @@ void mainboard_romstage_entry(void)
},
};
- /* Call into the real romstage main with this board's attributes. */
- romstage_common(&pei_data);
+ *pei_data = mainboard_pei_data; /* FIXME: Do not overwrite everything */
}