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-rw-r--r--src/mainboard/google/cheza/Kconfig1
-rw-r--r--src/mainboard/google/cheza/Makefile.inc4
-rw-r--r--src/mainboard/google/cheza/reset.c24
3 files changed, 28 insertions, 1 deletions
diff --git a/src/mainboard/google/cheza/Kconfig b/src/mainboard/google/cheza/Kconfig
index b940314acb..59f78a8e56 100644
--- a/src/mainboard/google/cheza/Kconfig
+++ b/src/mainboard/google/cheza/Kconfig
@@ -16,7 +16,6 @@ config BOARD_SPECIFIC_OPTIONS
select SPI_FLASH
select SPI_FLASH_WINBOND
select MAINBOARD_HAS_CHROMEOS
- select MISSING_BOARD_RESET
select MAINBOARD_HAS_TPM2
select MAINBOARD_HAS_SPI_TPM_CR50
diff --git a/src/mainboard/google/cheza/Makefile.inc b/src/mainboard/google/cheza/Makefile.inc
index 04099e2033..ff94b76377 100644
--- a/src/mainboard/google/cheza/Makefile.inc
+++ b/src/mainboard/google/cheza/Makefile.inc
@@ -17,17 +17,21 @@ bootblock-y += boardid.c
bootblock-y += memlayout.ld
bootblock-y += chromeos.c
bootblock-y += bootblock.c
+bootblock-y += reset.c
verstage-y += boardid.c
verstage-y += memlayout.ld
verstage-y += chromeos.c
+verstage-y += reset.c
romstage-y += boardid.c
romstage-y += memlayout.ld
romstage-y += chromeos.c
romstage-y += romstage.c
+romstage-y += reset.c
ramstage-y += boardid.c
ramstage-y += memlayout.ld
ramstage-y += chromeos.c
ramstage-y += mainboard.c
+ramstage-y += reset.c
diff --git a/src/mainboard/google/cheza/reset.c b/src/mainboard/google/cheza/reset.c
new file mode 100644
index 0000000000..b3cd192ec5
--- /dev/null
+++ b/src/mainboard/google/cheza/reset.c
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <ec/google/chromeec/ec.h>
+#include <reset.h>
+
+/* Can't do a "real" reset before the PMIC is initialized in QcLib (romstage),
+ but this works well enough for our purposes. */
+void do_board_reset(void)
+{
+ google_chromeec_reboot(0, EC_REBOOT_COLD, 0);
+}