diff options
Diffstat (limited to 'src/mainboard/google/cyan/romstage.c')
| -rw-r--r-- | src/mainboard/google/cyan/romstage.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/src/mainboard/google/cyan/romstage.c b/src/mainboard/google/cyan/romstage.c index 57c40e09bd..c164ea4792 100644 --- a/src/mainboard/google/cyan/romstage.c +++ b/src/mainboard/google/cyan/romstage.c @@ -15,6 +15,7 @@ */ #include <soc/romstage.h> +#include <baseboard/variants.h> #include <chip.h> /* All FSP specific code goes in this block */ @@ -28,15 +29,23 @@ void mainboard_romstage_entry(struct romstage_params *rp) romstage_common(rp); } -__attribute__ ((weak)) void mainboard_memory_init_params(struct romstage_params *params, MEMORY_INIT_UPD *memory_params) { /* Update SPD data */ - if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) { + if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) + memory_params->PcdMemoryTypeEnable = MEM_DDR3; + else memory_params->PcdMemoryTypeEnable = MEM_LPDDR3; - } memory_params->PcdMemorySpdPtr = (u32)params->pei_data->spd_data_ch0; memory_params->PcdMemChannel0Config = params->pei_data->spd_ch0_config; memory_params->PcdMemChannel1Config = params->pei_data->spd_ch1_config; + + /* Variant-specific memory params */ + variant_memory_init_params(memory_params); +} + +__attribute__ ((weak)) +void variant_memory_init_params(MEMORY_INIT_UPD *memory_params) +{ } |