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-rw-r--r--src/mainboard/google/drallion/variants/drallion/devicetree.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb
index 4011693d34..851248d77d 100644
--- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb
+++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb
@@ -444,12 +444,14 @@ chip soc/intel/cannonlake
device pci 1c.7 off end # PCI Express Port 8
device pci 1d.0 on
smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "2230" "SlotDataBusWidth1X"
+ register "PcieRpSlotImplemented[8]" = "1"
end # PCI Express Port 9
device pci 1d.1 off end # PCI Express Port 10
device pci 1d.2 off end # PCI Express Port 11
device pci 1d.3 off end # PCI Express Port 12
device pci 1d.4 on
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "2280" "SlotDataBusWidth4X"
+ register "PcieRpSlotImplemented[12]" = "1"
end # PCI Express Port 13 (x4)
device pci 1e.0 on end # UART #0
device pci 1e.1 off end # UART #1