summaryrefslogtreecommitdiff
path: root/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/google/hatch/variants/baseboard/devicetree.cb')
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/devicetree.cb5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index a12b71cfbd..f13fcf8f9a 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -329,7 +329,9 @@ chip soc/intel/cannonlake
device pci 1c.5 off end # PCI Express Port 6
device pci 1c.6 off end # PCI Express Port 7
device pci 1c.7 off end # PCI Express Port 8
- device pci 1d.0 on end # PCI Express Port 9 (X4 NVME)
+ device pci 1d.0 on # PCI Express Port 9 (X4 NVME)
+ register "PcieRpSlotImplemented[8]" = "1"
+ end
device pci 1d.1 off end # PCI Express Port 10
device pci 1d.2 off end # PCI Express Port 11
device pci 1d.3 off end # PCI Express Port 12
@@ -339,6 +341,7 @@ chip soc/intel/cannonlake
register "wake" = "GPE0_DW1_01"
device pci 00.0 on end
end
+ register "PcieRpSlotImplemented[13]" = "1"
end # PCI Express Port 14 (x4)
device pci 1e.0 on end # UART #0
device pci 1e.1 off end # UART #1