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Diffstat (limited to 'src/mainboard/google/lars/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/lars/devicetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/lars/devicetree.cb b/src/mainboard/google/lars/devicetree.cb index c601507b1f..bc39f3e345 100644 --- a/src/mainboard/google/lars/devicetree.cb +++ b/src/mainboard/google/lars/devicetree.cb @@ -32,6 +32,7 @@ chip soc/intel/skylake register "HeciEnabled" = "0" register "SaGv" = "3" register "FspSkipMpInit" = "1" + register "PmTimerDisabled" = "1" # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s |