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Diffstat (limited to 'src/mainboard/google/lars')
| -rw-r--r-- | src/mainboard/google/lars/devicetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/lars/devicetree.cb b/src/mainboard/google/lars/devicetree.cb index cf3649aa4d..50b3e1e8dc 100644 --- a/src/mainboard/google/lars/devicetree.cb +++ b/src/mainboard/google/lars/devicetree.cb @@ -15,6 +15,9 @@ chip soc/intel/skylake # EC host command range is in 0x800-0x8ff register "gen1_dec" = "0x00fc0801" + # Enable "Intel Speed Shift Technology" + register "speed_shift_enable" = "1" + # Enable DPTF register "dptf_enable" = "1" |