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Diffstat (limited to 'src/mainboard/google/link/romstage.c')
-rw-r--r--src/mainboard/google/link/romstage.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index cc2ef22ab6..d9f00f4bc3 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -30,7 +30,6 @@
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
-#include <southbridge/intel/common/rcba.h>
#include <southbridge/intel/common/gpio.h>
#include "ec/google/chromeec/ec.h"
#include <arch/cpu.h>
@@ -104,9 +103,9 @@ void mainboard_rcba_config(void)
DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD);
/* Enable IOAPIC (generic) */
- RCBA16(EOIC) = 0x0100;
+ RCBA16(OIC) = 0x0100;
/* PCH BWG says to read back the IOAPIC enable register */
- (void) RCBA16(EOIC);
+ (void) RCBA16(OIC);
}
static uint8_t *locate_spd(void)