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Diffstat (limited to 'src/mainboard/google/nyan_blaze')
-rw-r--r--src/mainboard/google/nyan_blaze/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index e3d7116d1a..f094e348f7 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -53,7 +53,7 @@ static void __attribute__((noinline)) romstage(void)
u32 dram_end_mb = sdram_max_addressable_mb();
u32 dram_size_mb = dram_end_mb - dram_start_mb;
-#if !CONFIG_VBOOT
+#if !IS_ENABLED(CONFIG_VBOOT)
configure_l2_cache();
mmu_init();
/* Device memory below DRAM is uncached. */
@@ -96,7 +96,7 @@ static void __attribute__((noinline)) romstage(void)
/* Stub to force arm_init_caches to the top, before any stack/memory accesses */
void main(void)
{
-#if !CONFIG_VBOOT
+#if !IS_ENABLED(CONFIG_VBOOT)
asm volatile ("bl arm_init_caches"
::: "r0","r1","r2","r3","r4","r5","ip");
#endif