summaryrefslogtreecommitdiff
path: root/src/mainboard/google/nyan_blaze
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/google/nyan_blaze')
-rw-r--r--src/mainboard/google/nyan_blaze/Kconfig3
-rw-r--r--src/mainboard/google/nyan_blaze/romstage.c6
2 files changed, 4 insertions, 5 deletions
diff --git a/src/mainboard/google/nyan_blaze/Kconfig b/src/mainboard/google/nyan_blaze/Kconfig
index 54e6ef3be7..3b7c555f58 100644
--- a/src/mainboard/google/nyan_blaze/Kconfig
+++ b/src/mainboard/google/nyan_blaze/Kconfig
@@ -85,8 +85,7 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS
config VBOOT_RAMSTAGE_INDEX
hex
- default 0x3 if VBOOT2_VERIFY_FIRMWARE
- default 0x2
+ default 0x3
config FLASHMAP_OFFSET
hex
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index c9510d627e..12b2ffb366 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -58,7 +58,7 @@ static void __attribute__((noinline)) romstage(void)
u32 dram_end_mb = sdram_max_addressable_mb();
u32 dram_size_mb = dram_end_mb - dram_start_mb;
-#if !CONFIG_VBOOT2_VERIFY_FIRMWARE
+#if !CONFIG_VBOOT_VERIFY_FIRMWARE
configure_l2_cache();
mmu_init();
/* Device memory below DRAM is uncached. */
@@ -95,7 +95,7 @@ static void __attribute__((noinline)) romstage(void)
early_mainboard_init();
-#if CONFIG_VBOOT2_VERIFY_FIRMWARE
+#if CONFIG_VBOOT_VERIFY_FIRMWARE
entry = vboot2_load_ramstage();
#else
early_mainboard_init();
@@ -108,7 +108,7 @@ static void __attribute__((noinline)) romstage(void)
/* Stub to force arm_init_caches to the top, before any stack/memory accesses */
void main(void)
{
-#if !CONFIG_VBOOT2_VERIFY_FIRMWARE
+#if !CONFIG_VBOOT_VERIFY_FIRMWARE
asm volatile ("bl arm_init_caches"
::: "r0","r1","r2","r3","r4","r5","ip");
#endif