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-rw-r--r--src/mainboard/google/oak/romstage.c22
1 files changed, 21 insertions, 1 deletions
diff --git a/src/mainboard/google/oak/romstage.c b/src/mainboard/google/oak/romstage.c
index d72693fa4d..3d018a02b1 100644
--- a/src/mainboard/google/oak/romstage.c
+++ b/src/mainboard/google/oak/romstage.c
@@ -17,7 +17,7 @@
#include <arch/exception.h>
#include <arch/io.h>
#include <arch/mmu.h>
-
+#include <boardid.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
@@ -25,14 +25,20 @@
#include <program_loading.h>
#include <romstage_handoff.h>
#include <symbols.h>
+#include <timer.h>
#include <timestamp.h>
#include <soc/emi.h>
#include <soc/mmu_operations.h>
+#include <soc/mt6391.h>
+#include <soc/pll.h>
#include <soc/rtc.h>
void main(void)
{
+ int stabilize_usec;
+ struct stopwatch sw;
+
timestamp_add_now(TS_START_ROMSTAGE);
/* init uart baudrate when pll on */
@@ -41,9 +47,23 @@ void main(void)
rtc_boot();
+ /* Raise CPU voltage to allow higher frequency */
+ stabilize_usec = mt6391_configure_ca53_voltage(1125000);
+
+ stopwatch_init_usecs_expire(&sw, stabilize_usec);
+
/* init memory */
mt_mem_init(get_sdram_config());
+ while (!stopwatch_expired(&sw))
+ ;
+
+ /* Set to maximum frequency */
+ if (board_id() < 5)
+ mt_pll_raise_ca53_freq(1600 * MHz);
+ else
+ mt_pll_raise_ca53_freq(1700 * MHz);
+
mt8173_mmu_after_dram();
/* should be called after memory init */