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-rw-r--r--src/mainboard/google/sarien/variants/arcada/devicetree.cb2
-rw-r--r--src/mainboard/google/sarien/variants/sarien/devicetree.cb2
2 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index 4af8ca25ca..6bc3df11af 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -27,6 +27,8 @@ chip soc/intel/cannonlake
register "PchPmSlpSusMinAssert" = "4" # 4s
register "PchPmSlpAMinAssert" = "4" # 2s
register "PchUnlockGpioPads" = "1"
+ # USB2 PHY Power gating
+ register "PchUsb2PhySusPgDisable" = "1"
register "speed_shift_enable" = "1"
register "psys_pmax" = "140"
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
index cd216e593b..b2aa8d5e8d 100644
--- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -30,6 +30,8 @@ chip soc/intel/cannonlake
register "PchPmSlpS4MinAssert" = "4" # 4s
register "PchPmSlpSusMinAssert" = "4" # 4s
register "PchPmSlpAMinAssert" = "4" # 2s
+ # USB2 PHY Power gating
+ register "PchUsb2PhySusPgDisable" = "1"
register "speed_shift_enable" = "1"
register "s0ix_enable" = "1"