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Diffstat (limited to 'src/mainboard/google/snow/romstage.c')
-rw-r--r--src/mainboard/google/snow/romstage.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index 7442f7afc2..f69fb1f7eb 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -21,6 +21,7 @@
#include <armv7.h>
#include <cbfs.h>
+#include <cbmem.h>
#include <arch/cache.h>
#include <cpu/samsung/exynos5250/i2c.h>
@@ -189,6 +190,8 @@ void main(void)
/* Set SPI (primary CBFS media) clock to 50MHz. */
clock_set_rate(PERIPH_ID_SPI1, 50000000);
+ cbmem_initialize_empty();
+
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram");
stage_exit(entry);
}