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Diffstat (limited to 'src/mainboard/google/veyron/boardid.c')
-rw-r--r--src/mainboard/google/veyron/boardid.c49
1 files changed, 49 insertions, 0 deletions
diff --git a/src/mainboard/google/veyron/boardid.c b/src/mainboard/google/veyron/boardid.c
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index 0000000000..f7cddcc4fe
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+++ b/src/mainboard/google/veyron/boardid.c
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+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include <boardid.h>
+#include <console/console.h>
+#include <gpio.h>
+#include <stdlib.h>
+
+uint8_t board_id(void)
+{
+ static int id = -1;
+ static gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
+ [1] = GPIO(2, A, 1), [0] = GPIO(2, A, 0)}; /* GPIO2_A0 is LSB */
+
+ if (id < 0) {
+ id = gpio_base2_value(pins, ARRAY_SIZE(pins));
+ printk(BIOS_SPEW, "Board ID: %d.\n", id);
+ }
+
+ return id;
+}
+
+uint32_t ram_code(void)
+{
+ uint32_t code;
+ static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
+ [1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
+
+ code = gpio_base2_value(pins, ARRAY_SIZE(pins));
+ printk(BIOS_SPEW, "RAM Config: %u.\n", code);
+
+ return code;
+}