summaryrefslogtreecommitdiff
path: root/src/mainboard/google/veyron/devicetree.cb
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/google/veyron/devicetree.cb')
-rw-r--r--src/mainboard/google/veyron/devicetree.cb49
1 files changed, 0 insertions, 49 deletions
diff --git a/src/mainboard/google/veyron/devicetree.cb b/src/mainboard/google/veyron/devicetree.cb
deleted file mode 100644
index 0acbae9e18..0000000000
--- a/src/mainboard/google/veyron/devicetree.cb
+++ /dev/null
@@ -1,49 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright 2014 Rockchip Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-
-# TODO fill with Versatile Express board data in QEMU.
-chip soc/rockchip/rk3288
- device cpu_cluster 0 on end
- #SCREEN_RGB
- register "screen_type" = "2"
- #LVDS_8BIT_2
- register "lvds_format" = "1"
- #OUT_D888_P666
- register "out_face" = "33"
- register "clock_frequency" = "71000000"
- register "hactive" = "1280"
- register "vactive" = "800"
- register "hback_porch" = "100"
- register "hfront_porch" = "18"
- register "vback_porch" = "8"
- register "vfront_porch" = "6"
- register "hsync_len" = "10"
- register "vsync_len" = "2"
- register "hsync_active" = "0"
- register "vsync_active" = "0"
- register "de_active" = "0"
- register "pixelclk_active" = "0"
- register "swap_rb" = "0"
- register "swap_rg" = "0"
- register "swap_gb" = "0"
- #LCD_EN_GPIO:GPIO7_A3
- register "lcd_en_gpio" = "0xff7e0004"
- #LCD_CS_GPIO:GPIO7_A4
- register "lcd_cs_gpio" = "0xff7e0005"
-end