diff options
Diffstat (limited to 'src/mainboard/google/veyron_mighty')
| -rw-r--r-- | src/mainboard/google/veyron_mighty/bootblock.c | 10 | ||||
| -rw-r--r-- | src/mainboard/google/veyron_mighty/mainboard.c | 24 | ||||
| -rw-r--r-- | src/mainboard/google/veyron_mighty/romstage.c | 2 |
3 files changed, 18 insertions, 18 deletions
diff --git a/src/mainboard/google/veyron_mighty/bootblock.c b/src/mainboard/google/veyron_mighty/bootblock.c index 19c2aec0db..985152bebc 100644 --- a/src/mainboard/google/veyron_mighty/bootblock.c +++ b/src/mainboard/google/veyron_mighty/bootblock.c @@ -38,7 +38,7 @@ void bootblock_mainboard_early_init() { if (IS_ENABLED(CONFIG_DRIVERS_UART)) { assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE); - writel(IOMUX_UART2, &rk3288_grf->iomux_uart2); + write32(&rk3288_grf->iomux_uart2, IOMUX_UART2); } } @@ -62,16 +62,16 @@ void bootblock_mainboard_init(void) rkclk_configure_cpu(); /* i2c1 for tpm */ - writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1); + write32(&rk3288_grf->iomux_i2c1, IOMUX_I2C1); i2c_init(1, 400*KHz); /* spi2 for firmware ROM */ - writel(IOMUX_SPI2_CSCLK, &rk3288_grf->iomux_spi2csclk); - writel(IOMUX_SPI2_TXRX, &rk3288_grf->iomux_spi2txrx); + write32(&rk3288_grf->iomux_spi2csclk, IOMUX_SPI2_CSCLK); + write32(&rk3288_grf->iomux_spi2txrx, IOMUX_SPI2_TXRX); rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS, 11*MHz); /* spi0 for chrome ec */ - writel(IOMUX_SPI0, &rk3288_grf->iomux_spi0); + write32(&rk3288_grf->iomux_spi0, IOMUX_SPI0); rockchip_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 9*MHz); setup_chromeos_gpios(); diff --git a/src/mainboard/google/veyron_mighty/mainboard.c b/src/mainboard/google/veyron_mighty/mainboard.c index fb1d8fa69e..5c417544ea 100644 --- a/src/mainboard/google/veyron_mighty/mainboard.c +++ b/src/mainboard/google/veyron_mighty/mainboard.c @@ -50,10 +50,10 @@ static void configure_usb(void) static void configure_sdmmc(void) { - writel(IOMUX_SDMMC0, &rk3288_grf->iomux_sdmmc0); + write32(&rk3288_grf->iomux_sdmmc0, IOMUX_SDMMC0); /* use sdmmc0 io, disable JTAG function */ - writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0); + write32(&rk3288_grf->soc_con0, RK_CLRBITS(1 << 12)); /* Note: these power rail definitions are copied in romstage.c */ rk808_configure_ldo(4, 3300); /* VCCIO_SD */ @@ -64,34 +64,34 @@ static void configure_sdmmc(void) static void configure_emmc(void) { - writel(IOMUX_EMMCDATA, &rk3288_grf->iomux_emmcdata); - writel(IOMUX_EMMCPWREN, &rk3288_grf->iomux_emmcpwren); - writel(IOMUX_EMMCCMD, &rk3288_grf->iomux_emmccmd); + write32(&rk3288_grf->iomux_emmcdata, IOMUX_EMMCDATA); + write32(&rk3288_grf->iomux_emmcpwren, IOMUX_EMMCPWREN); + write32(&rk3288_grf->iomux_emmccmd, IOMUX_EMMCCMD); gpio_output(GPIO(2, B, 1), 1); /* EMMC_RST_L */ } static void configure_codec(void) { - writel(IOMUX_I2C2, &rk3288_grf->iomux_i2c2); /* CODEC I2C */ + write32(&rk3288_grf->iomux_i2c2, IOMUX_I2C2); /* CODEC I2C */ i2c_init(2, 400*KHz); /* CODEC I2C */ - writel(IOMUX_I2S, &rk3288_grf->iomux_i2s); - writel(IOMUX_I2SCLK, &rk3288_grf->iomux_i2sclk); + write32(&rk3288_grf->iomux_i2s, IOMUX_I2S); + write32(&rk3288_grf->iomux_i2sclk, IOMUX_I2SCLK); rk808_configure_ldo(6, 1800); /* VCC18_CODEC */ /* AUDIO IO domain 1.8V voltage selection */ - writel(RK_SETBITS(1 << 6), &rk3288_grf->io_vsel); + write32(&rk3288_grf->io_vsel, RK_SETBITS(1 << 6)); rkclk_configure_i2s(12288000); } static void configure_vop(void) { - writel(IOMUX_LCDC, &rk3288_grf->iomux_lcdc); + write32(&rk3288_grf->iomux_lcdc, IOMUX_LCDC); /* lcdc(vop) iodomain select 1.8V */ - writel(RK_SETBITS(1 << 0), &rk3288_grf->io_vsel); + write32(&rk3288_grf->io_vsel, RK_SETBITS(1 << 0)); switch (board_id()) { case 0: @@ -107,7 +107,7 @@ static void configure_vop(void) /* enable edp HPD */ gpio_input_pulldown(GPIO(7, B, 3)); - writel(IOMUX_EDP_HOTPLUG, &rk3288_grf->iomux_edp_hotplug); + write32(&rk3288_grf->iomux_edp_hotplug, IOMUX_EDP_HOTPLUG); break; } } diff --git a/src/mainboard/google/veyron_mighty/romstage.c b/src/mainboard/google/veyron_mighty/romstage.c index 9d19586cd5..e8f54deedd 100644 --- a/src/mainboard/google/veyron_mighty/romstage.c +++ b/src/mainboard/google/veyron_mighty/romstage.c @@ -48,7 +48,7 @@ static void regulate_vdd_log(unsigned int mv) const u32 max_regulator_mv = 1350; /* 1.35V */ const u32 min_regulator_mv = 870; /* 0.87V */ - writel(IOMUX_PWM1, &rk3288_grf->iomux_pwm1); + write32(&rk3288_grf->iomux_pwm1, IOMUX_PWM1); assert((mv >= min_regulator_mv) && (mv <= max_regulator_mv)); |