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Diffstat (limited to 'src/mainboard/google/veyron_rialto')
-rw-r--r--src/mainboard/google/veyron_rialto/romstage.c25
1 files changed, 6 insertions, 19 deletions
diff --git a/src/mainboard/google/veyron_rialto/romstage.c b/src/mainboard/google/veyron_rialto/romstage.c
index 68ab661d44..9cdacc3e1a 100644
--- a/src/mainboard/google/veyron_rialto/romstage.c
+++ b/src/mainboard/google/veyron_rialto/romstage.c
@@ -86,13 +86,7 @@ static void sdmmc_power_off(void)
void main(void)
{
-#if CONFIG_COLLECT_TIMESTAMPS
- uint64_t start_romstage_time;
- uint64_t before_dram_time;
- uint64_t after_dram_time;
- uint64_t base_time = timestamp_get();
- start_romstage_time = timestamp_get();
-#endif
+ timestamp_add_now(TS_START_ROMSTAGE);
console_init();
configure_l2ctlr();
@@ -103,13 +97,12 @@ void main(void)
/* vdd_log 1200mv is enough for ddr run 666Mhz */
regulate_vdd_log(1200);
-#if CONFIG_COLLECT_TIMESTAMPS
- before_dram_time = timestamp_get();
-#endif
+
+ timestamp_add_now(TS_BEFORE_INITRAM);
+
sdram_init(get_sdram_config());
-#if CONFIG_COLLECT_TIMESTAMPS
- after_dram_time = timestamp_get();
-#endif
+
+ timestamp_add_now(TS_AFTER_INITRAM);
/* Now that DRAM is up, add mappings for it and DMA coherency buffer. */
mmu_config_range((uintptr_t)_dram/MiB,
@@ -119,13 +112,7 @@ void main(void)
cbmem_initialize_empty();
-#if CONFIG_COLLECT_TIMESTAMPS
- timestamp_init(base_time);
- timestamp_add(TS_START_ROMSTAGE, start_romstage_time);
- timestamp_add(TS_BEFORE_INITRAM, before_dram_time);
- timestamp_add(TS_AFTER_INITRAM, after_dram_time);
timestamp_add_now(TS_END_ROMSTAGE);
-#endif
run_ramstage();
}