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-rw-r--r--src/mainboard/google/butterfly/romstage.c2
-rw-r--r--src/mainboard/google/link/romstage.c2
-rw-r--r--src/mainboard/google/parrot/romstage.c4
-rw-r--r--src/mainboard/google/stout/romstage.c2
4 files changed, 3 insertions, 7 deletions
diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c
index 3aef9d0a09..e1d948d89f 100644
--- a/src/mainboard/google/butterfly/romstage.c
+++ b/src/mainboard/google/butterfly/romstage.c
@@ -28,7 +28,7 @@
#include <vendorcode/google/chromeos/chromeos.h>
#endif
-void pch_enable_lpc(void)
+void mainboard_pch_lpc_setup(void)
{
/* EC Decode Range Port60/64 and Port62/66 */
/* Enable EC and PS/2 Keyboard/Mouse*/
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index 628e2a0052..3fd90e9b17 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -32,7 +32,7 @@
#include <southbridge/intel/bd82x6x/chip.h>
-void pch_enable_lpc(void)
+void mainboard_pch_lpc_setup(void)
{
/* Enable PS/2 Keyboard/Mouse, EC areas and COM1 */
pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | MC_LPC_EN | \
diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c
index 604cf7b284..caff3f5436 100644
--- a/src/mainboard/google/parrot/romstage.c
+++ b/src/mainboard/google/parrot/romstage.c
@@ -26,10 +26,6 @@
#include <southbridge/intel/common/gpio.h>
#include "ec/compal/ene932/ec.h"
-void pch_enable_lpc(void)
-{
-}
-
void mainboard_late_rcba_config(void)
{
u32 reg32;
diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c
index cbbae2ee07..d8e04eaa63 100644
--- a/src/mainboard/google/stout/romstage.c
+++ b/src/mainboard/google/stout/romstage.c
@@ -30,7 +30,7 @@
#include "ec.h"
#include "onboard.h"
-void pch_enable_lpc(void)
+void mainboard_pch_lpc_setup(void)
{
/*
* Enable: