diff options
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/zoombini/variants/baseboard/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/google/zoombini/variants/meowth/devicetree.cb | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb b/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb index c7ef264eaa..36c6595feb 100644 --- a/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb @@ -20,7 +20,6 @@ chip soc/intel/cannonlake # FSP configuration register "SaGv" = "3" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" # Intel Common SoC Config diff --git a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb index c3a546ec2d..b014353e0b 100644 --- a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb +++ b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb @@ -29,7 +29,6 @@ chip soc/intel/cannonlake # FSP configuration register "SaGv" = "SaGv_Enabled" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" # Intel Common SoC Config |