summaryrefslogtreecommitdiff
path: root/src/mainboard/google
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/reef/variants/pyro/devicetree.cb2
-rw-r--r--src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl2
2 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb
index b5e050ea4f..bc06bbba11 100644
--- a/src/mainboard/google/reef/variants/pyro/devicetree.cb
+++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb
@@ -53,6 +53,8 @@ chip soc/intel/apollolake
# current VR solution. Experiments show that SoC TDP max (6W) can
# be reached when RAPL PL1 is set to 12W.
register "tdp_pl1_override_mw" = "12000"
+ # Set RAPL PL2 to 15W.
+ register "tdp_pl2_override_mw" = "15000"
# Enable Audio Clock and Power gating
register "hdaudio_clk_gate_enable" = "1"
diff --git a/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl b/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl
index 7e2f31cdee..f14999c11c 100644
--- a/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl
@@ -81,7 +81,7 @@ Name (MPPC, Package ()
Package () { /* Power Limit 2 */
1, /* PowerLimitIndex, 1 for Power Limit 2 */
6000, /* PowerLimitMinimum */
- 8000, /* PowerLimitMaximum */
+ 15000, /* PowerLimitMaximum */
1000, /* TimeWindowMinimum */
1000, /* TimeWindowMaximum */
1000 /* StepSize */