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-rw-r--r--src/mainboard/google/zork/variants/baseboard/fsps_baseboard_dalboz.c12
-rw-r--r--src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c24
2 files changed, 18 insertions, 18 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_dalboz.c
index b0037090c7..82a11b05fb 100644
--- a/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_dalboz.c
+++ b/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_dalboz.c
@@ -18,8 +18,8 @@ static const fsp_pcie_descriptor pcie_descriptors[] = {
// NVME SSD
.port_present = true,
.engine_type = PCIE_ENGINE,
- .start_lane = NVME_START_LANE,
- .end_lane = NVME_END_LANE,
+ .start_logical_lane = NVME_START_LANE,
+ .end_logical_lane = NVME_END_LANE,
.device_number = 1,
.function_number = 7,
.link_aspm = ASPM_L1,
@@ -33,8 +33,8 @@ static const fsp_pcie_descriptor pcie_descriptors[] = {
// WLAN
.port_present = true,
.engine_type = PCIE_ENGINE,
- .start_lane = WLAN_START_LANE,
- .end_lane = WLAN_END_LANE,
+ .start_logical_lane = WLAN_START_LANE,
+ .end_logical_lane = WLAN_END_LANE,
.device_number = 1,
.function_number = 2,
.link_aspm = ASPM_L1,
@@ -48,8 +48,8 @@ static const fsp_pcie_descriptor pcie_descriptors[] = {
// SD Reader
.port_present = true,
.engine_type = PCIE_ENGINE,
- .start_lane = SD_START_LANE,
- .end_lane = SD_END_LANE,
+ .start_logical_lane = SD_START_LANE,
+ .end_logical_lane = SD_END_LANE,
.device_number = 1,
.function_number = 3,
.link_aspm = ASPM_L1,
diff --git a/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c
index df42f6b87e..9e82684442 100644
--- a/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c
+++ b/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c
@@ -23,8 +23,8 @@ static const fsp_pcie_descriptor pco_pcie_descriptors[] = {
// NVME SSD
.port_present = true,
.engine_type = PCIE_ENGINE,
- .start_lane = 0,
- .end_lane = 3,
+ .start_logical_lane = 0,
+ .end_logical_lane = 3,
.device_number = 1,
.function_number = 7,
.link_aspm = ASPM_L1,
@@ -37,8 +37,8 @@ static const fsp_pcie_descriptor pco_pcie_descriptors[] = {
// WLAN
.port_present = true,
.engine_type = PCIE_ENGINE,
- .start_lane = 4,
- .end_lane = 4,
+ .start_logical_lane = 4,
+ .end_logical_lane = 4,
.device_number = 1,
.function_number = 2,
.link_aspm = ASPM_L1,
@@ -52,8 +52,8 @@ static const fsp_pcie_descriptor pco_pcie_descriptors[] = {
// SD Reader
.port_present = true,
.engine_type = PCIE_ENGINE,
- .start_lane = 5,
- .end_lane = 5,
+ .start_logical_lane = 5,
+ .end_logical_lane = 5,
.device_number = 1,
.function_number = 3,
.link_aspm = ASPM_L1,
@@ -69,8 +69,8 @@ static const fsp_pcie_descriptor dali_pcie_descriptors[] = {
// NVME SSD
.port_present = true,
.engine_type = PCIE_ENGINE,
- .start_lane = NVME_START_LANE,
- .end_lane = NVME_END_LANE,
+ .start_logical_lane = NVME_START_LANE,
+ .end_logical_lane = NVME_END_LANE,
.device_number = 1,
.function_number = 7,
.link_aspm = ASPM_L1,
@@ -84,8 +84,8 @@ static const fsp_pcie_descriptor dali_pcie_descriptors[] = {
// WLAN
.port_present = true,
.engine_type = PCIE_ENGINE,
- .start_lane = WLAN_START_LANE,
- .end_lane = WLAN_END_LANE,
+ .start_logical_lane = WLAN_START_LANE,
+ .end_logical_lane = WLAN_END_LANE,
.device_number = 1,
.function_number = 2,
.link_aspm = ASPM_L1,
@@ -99,8 +99,8 @@ static const fsp_pcie_descriptor dali_pcie_descriptors[] = {
// SD Reader
.port_present = true,
.engine_type = PCIE_ENGINE,
- .start_lane = SD_START_LANE,
- .end_lane = SD_END_LANE,
+ .start_logical_lane = SD_START_LANE,
+ .end_logical_lane = SD_END_LANE,
.device_number = 1,
.function_number = 3,
.link_aspm = ASPM_L1,