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-rw-r--r--src/mainboard/google/daisy/mainboard.c6
-rw-r--r--src/mainboard/google/foster/pmic.c4
-rw-r--r--src/mainboard/google/foster/pmic.h2
-rw-r--r--src/mainboard/google/gale/cdp.c2
-rw-r--r--src/mainboard/google/nyan/pmic.c6
-rw-r--r--src/mainboard/google/nyan/pmic.h2
-rw-r--r--src/mainboard/google/nyan_big/pmic.c6
-rw-r--r--src/mainboard/google/nyan_big/pmic.h2
-rw-r--r--src/mainboard/google/nyan_blaze/pmic.c6
-rw-r--r--src/mainboard/google/nyan_blaze/pmic.h2
-rw-r--r--src/mainboard/google/peach_pit/mainboard.c6
-rw-r--r--src/mainboard/google/smaug/pmic.c8
-rw-r--r--src/mainboard/google/smaug/pmic.h4
-rw-r--r--src/mainboard/google/storm/cdp.c2
14 files changed, 29 insertions, 29 deletions
diff --git a/src/mainboard/google/daisy/mainboard.c b/src/mainboard/google/daisy/mainboard.c
index 46939b70e9..30f8805c41 100644
--- a/src/mainboard/google/daisy/mainboard.c
+++ b/src/mainboard/google/daisy/mainboard.c
@@ -330,9 +330,9 @@ static void mainboard_enable(struct device *dev)
mmu_config_range(DRAM_END, 4096 - DRAM_END, DCACHE_OFF);
dcache_mmu_enable();
- const unsigned epll_hz = 192000000;
- const unsigned sample_rate = 48000;
- const unsigned lr_frame_size = 256;
+ const unsigned int epll_hz = 192000000;
+ const unsigned int sample_rate = 48000;
+ const unsigned int lr_frame_size = 256;
clock_epll_set_rate(epll_hz);
clock_select_i2s_clk_source();
clock_set_i2s_clk_prescaler(epll_hz, sample_rate * lr_frame_size);
diff --git a/src/mainboard/google/foster/pmic.c b/src/mainboard/google/foster/pmic.c
index 13e2a4743f..6435317a22 100644
--- a/src/mainboard/google/foster/pmic.c
+++ b/src/mainboard/google/foster/pmic.c
@@ -34,7 +34,7 @@ struct max77620_init_reg {
u8 delay;
};
-static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay)
+static void pmic_write_reg(unsigned int bus, uint8_t reg, uint8_t val, int delay)
{
if (i2c_writeb(bus, MAX77620_I2C_ADDR, reg, val)) {
printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
@@ -47,7 +47,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay)
}
}
-void pmic_init(unsigned bus)
+void pmic_init(unsigned int bus)
{
/* Setup/Enable GPIO5 - VDD_CPU_REG_EN */
pmic_write_reg(bus, MAX77620_GPIO5_REG, 0x09, 1);
diff --git a/src/mainboard/google/foster/pmic.h b/src/mainboard/google/foster/pmic.h
index 13ca1ee600..b4735bde95 100644
--- a/src/mainboard/google/foster/pmic.h
+++ b/src/mainboard/google/foster/pmic.h
@@ -65,6 +65,6 @@
#define MAX77620_CID4_REG 0x5C
#define MAX77620_CID5_REG 0x5D
-void pmic_init(unsigned bus);
+void pmic_init(unsigned int bus);
#endif /* __MAINBOARD_GOOGLE_FOSTER_PMIC_H__ */
diff --git a/src/mainboard/google/gale/cdp.c b/src/mainboard/google/gale/cdp.c
index 11a0f687eb..2b1d145d86 100644
--- a/src/mainboard/google/gale/cdp.c
+++ b/src/mainboard/google/gale/cdp.c
@@ -20,7 +20,7 @@
#include <types.h>
#include <boardid.h>
-void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned count)
+void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned int count)
{
int i;
diff --git a/src/mainboard/google/nyan/pmic.c b/src/mainboard/google/nyan/pmic.c
index d2264591fd..893d2eace5 100644
--- a/src/mainboard/google/nyan/pmic.c
+++ b/src/mainboard/google/nyan/pmic.c
@@ -55,7 +55,7 @@ static struct as3722_init_reg init_list[] = {
{AS3722_LDO11, 0x00, 1},
};
-static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
+static void pmic_write_reg(unsigned int bus, uint8_t reg, uint8_t val, int do_delay)
{
if (i2c_writeb(bus, AS3722_I2C_ADDR, reg, val)) {
printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
@@ -68,7 +68,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
}
}
-static void pmic_slam_defaults(unsigned bus)
+static void pmic_slam_defaults(unsigned int bus)
{
int i;
for (i = 0; i < ARRAY_SIZE(init_list); i++) {
@@ -77,7 +77,7 @@ static void pmic_slam_defaults(unsigned bus)
}
}
-void pmic_init(unsigned bus)
+void pmic_init(unsigned int bus)
{
/*
* Don't need to set up VDD_CORE - already done - by OTP
diff --git a/src/mainboard/google/nyan/pmic.h b/src/mainboard/google/nyan/pmic.h
index 9843b72156..639725e431 100644
--- a/src/mainboard/google/nyan/pmic.h
+++ b/src/mainboard/google/nyan/pmic.h
@@ -39,6 +39,6 @@ enum {
AS3722_LDO11,
};
-void pmic_init(unsigned bus);
+void pmic_init(unsigned int bus);
#endif /* __MAINBOARD_GOOGLE_NYAN_PMIC_H__ */
diff --git a/src/mainboard/google/nyan_big/pmic.c b/src/mainboard/google/nyan_big/pmic.c
index 948d867750..f70e6dd49f 100644
--- a/src/mainboard/google/nyan_big/pmic.c
+++ b/src/mainboard/google/nyan_big/pmic.c
@@ -55,7 +55,7 @@ static struct as3722_init_reg init_list[] = {
{AS3722_LDO11, 0x00, 1},
};
-static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
+static void pmic_write_reg(unsigned int bus, uint8_t reg, uint8_t val, int do_delay)
{
if (i2c_writeb(bus, AS3722_I2C_ADDR, reg, val)) {
printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
@@ -68,7 +68,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
}
}
-static void pmic_slam_defaults(unsigned bus)
+static void pmic_slam_defaults(unsigned int bus)
{
int i;
@@ -78,7 +78,7 @@ static void pmic_slam_defaults(unsigned bus)
}
}
-void pmic_init(unsigned bus)
+void pmic_init(unsigned int bus)
{
/*
* Don't need to set up VDD_CORE - already done - by OTP
diff --git a/src/mainboard/google/nyan_big/pmic.h b/src/mainboard/google/nyan_big/pmic.h
index 65ee264145..e4fbb8d56c 100644
--- a/src/mainboard/google/nyan_big/pmic.h
+++ b/src/mainboard/google/nyan_big/pmic.h
@@ -39,6 +39,6 @@ enum {
AS3722_LDO11,
};
-void pmic_init(unsigned bus);
+void pmic_init(unsigned int bus);
#endif /* __MAINBOARD_GOOGLE_NYAN_BIG_PMIC_H__ */
diff --git a/src/mainboard/google/nyan_blaze/pmic.c b/src/mainboard/google/nyan_blaze/pmic.c
index 948d867750..f70e6dd49f 100644
--- a/src/mainboard/google/nyan_blaze/pmic.c
+++ b/src/mainboard/google/nyan_blaze/pmic.c
@@ -55,7 +55,7 @@ static struct as3722_init_reg init_list[] = {
{AS3722_LDO11, 0x00, 1},
};
-static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
+static void pmic_write_reg(unsigned int bus, uint8_t reg, uint8_t val, int do_delay)
{
if (i2c_writeb(bus, AS3722_I2C_ADDR, reg, val)) {
printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
@@ -68,7 +68,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay)
}
}
-static void pmic_slam_defaults(unsigned bus)
+static void pmic_slam_defaults(unsigned int bus)
{
int i;
@@ -78,7 +78,7 @@ static void pmic_slam_defaults(unsigned bus)
}
}
-void pmic_init(unsigned bus)
+void pmic_init(unsigned int bus)
{
/*
* Don't need to set up VDD_CORE - already done - by OTP
diff --git a/src/mainboard/google/nyan_blaze/pmic.h b/src/mainboard/google/nyan_blaze/pmic.h
index a1213d9b2d..02b3e81a9c 100644
--- a/src/mainboard/google/nyan_blaze/pmic.h
+++ b/src/mainboard/google/nyan_blaze/pmic.h
@@ -39,6 +39,6 @@ enum {
AS3722_LDO11,
};
-void pmic_init(unsigned bus);
+void pmic_init(unsigned int bus);
#endif /* __MAINBOARD_GOOGLE_NYAN_BLAZE_PMIC_H__ */
diff --git a/src/mainboard/google/peach_pit/mainboard.c b/src/mainboard/google/peach_pit/mainboard.c
index ecd2260511..234a433acb 100644
--- a/src/mainboard/google/peach_pit/mainboard.c
+++ b/src/mainboard/google/peach_pit/mainboard.c
@@ -465,9 +465,9 @@ static void mainboard_enable(struct device *dev)
mmu_config_range((uintptr_t)_dma_coherent/MiB,
REGION_SIZE(dma_coherent)/MiB, DCACHE_OFF);
- const unsigned epll_hz = 192000000;
- const unsigned sample_rate = 48000;
- const unsigned lr_frame_size = 256;
+ const unsigned int epll_hz = 192000000;
+ const unsigned int sample_rate = 48000;
+ const unsigned int lr_frame_size = 256;
clock_epll_set_rate(epll_hz);
clock_select_i2s_clk_source();
clock_set_i2s_clk_prescaler(epll_hz, sample_rate * lr_frame_size);
diff --git a/src/mainboard/google/smaug/pmic.c b/src/mainboard/google/smaug/pmic.c
index 9add211ccd..68e0f6ccd3 100644
--- a/src/mainboard/google/smaug/pmic.c
+++ b/src/mainboard/google/smaug/pmic.c
@@ -36,7 +36,7 @@ struct max77620_init_reg {
u8 delay;
};
-static void pmic_write_reg(unsigned bus, uint8_t chip, uint8_t reg, uint8_t val,
+static void pmic_write_reg(unsigned int bus, uint8_t chip, uint8_t reg, uint8_t val,
int delay)
{
if (i2c_writeb(bus, chip, reg, val)) {
@@ -50,19 +50,19 @@ static void pmic_write_reg(unsigned bus, uint8_t chip, uint8_t reg, uint8_t val,
}
}
-void pmic_write_reg_77620(unsigned bus, uint8_t reg, uint8_t val,
+void pmic_write_reg_77620(unsigned int bus, uint8_t reg, uint8_t val,
int delay)
{
pmic_write_reg(bus, MAX77620_I2C_ADDR, reg, val, delay);
}
-static inline void pmic_write_reg_77621(unsigned bus, uint8_t reg, uint8_t val,
+static inline void pmic_write_reg_77621(unsigned int bus, uint8_t reg, uint8_t val,
int delay)
{
pmic_write_reg(bus, MAX77621_CPU_I2C_ADDR, reg, val, delay);
}
-void pmic_init(unsigned bus)
+void pmic_init(unsigned int bus)
{
/* MAX77620: Set SD0 to 1.0V - VDD_CORE */
pmic_write_reg_77620(bus, MAX77620_SD0_REG, 0x20, 1);
diff --git a/src/mainboard/google/smaug/pmic.h b/src/mainboard/google/smaug/pmic.h
index e01a556948..130f134d95 100644
--- a/src/mainboard/google/smaug/pmic.h
+++ b/src/mainboard/google/smaug/pmic.h
@@ -73,8 +73,8 @@
#define MAX77621_CONTROL1_REG 0x02
#define MAX77621_CONTROL2_REG 0x03
-void pmic_init(unsigned bus);
-void pmic_write_reg_77620(unsigned bus, uint8_t reg, uint8_t val,
+void pmic_init(unsigned int bus);
+void pmic_write_reg_77620(unsigned int bus, uint8_t reg, uint8_t val,
int delay);
#endif /* __MAINBOARD_GOOGLE_FOSTER_PMIC_H__ */
diff --git a/src/mainboard/google/storm/cdp.c b/src/mainboard/google/storm/cdp.c
index 3c27491c50..f143bf9171 100644
--- a/src/mainboard/google/storm/cdp.c
+++ b/src/mainboard/google/storm/cdp.c
@@ -21,7 +21,7 @@
#include <types.h>
#include <boardid.h>
-void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned count)
+void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned int count)
{
int i;
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-04 09:16:54 +0000