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-rw-r--r--src/mainboard/google/butterfly/devicetree.cb1
-rw-r--r--src/mainboard/google/link/devicetree.cb1
-rw-r--r--src/mainboard/google/parrot/devicetree.cb1
-rw-r--r--src/mainboard/google/stout/devicetree.cb1
4 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/butterfly/devicetree.cb b/src/mainboard/google/butterfly/devicetree.cb
index d8a0ee1c31..3c08b8bb60 100644
--- a/src/mainboard/google/butterfly/devicetree.cb
+++ b/src/mainboard/google/butterfly/devicetree.cb
@@ -66,7 +66,6 @@ chip northbridge/intel/sandybridge
register "pcie_port_coalesce" = "1"
register "c2_latency" = "101" # c2 not supported
- register "p_cnt_throttling_supported" = "1"
device pci 14.0 on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1
diff --git a/src/mainboard/google/link/devicetree.cb b/src/mainboard/google/link/devicetree.cb
index 1b27a69b54..ec7fb201d7 100644
--- a/src/mainboard/google/link/devicetree.cb
+++ b/src/mainboard/google/link/devicetree.cb
@@ -64,7 +64,6 @@ chip northbridge/intel/sandybridge
register "pcie_port_coalesce" = "1"
register "c2_latency" = "1"
- register "p_cnt_throttling_supported" = "0"
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
diff --git a/src/mainboard/google/parrot/devicetree.cb b/src/mainboard/google/parrot/devicetree.cb
index 046db97585..33d3544264 100644
--- a/src/mainboard/google/parrot/devicetree.cb
+++ b/src/mainboard/google/parrot/devicetree.cb
@@ -62,7 +62,6 @@ chip northbridge/intel/sandybridge
register "pcie_port_coalesce" = "1"
register "c2_latency" = "1"
- register "p_cnt_throttling_supported" = "0"
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb
index ddcf4e22d1..b9ccbf938c 100644
--- a/src/mainboard/google/stout/devicetree.cb
+++ b/src/mainboard/google/stout/devicetree.cb
@@ -73,7 +73,6 @@ chip northbridge/intel/sandybridge
register "pcie_port_coalesce" = "1"
register "c2_latency" = "1"
- register "p_cnt_throttling_supported" = "0"
device pci 14.0 on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1