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-rw-r--r--src/mainboard/google/octopus/variants/fleex/Makefile.inc4
-rw-r--r--src/mainboard/google/octopus/variants/fleex/gpio.c133
-rw-r--r--src/mainboard/google/octopus/variants/fleex/overridetree.cb1
-rw-r--r--src/mainboard/google/octopus/variants/fleex/variant.c73
4 files changed, 211 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/fleex/Makefile.inc b/src/mainboard/google/octopus/variants/fleex/Makefile.inc
new file mode 100644
index 0000000000..d54ed40095
--- /dev/null
+++ b/src/mainboard/google/octopus/variants/fleex/Makefile.inc
@@ -0,0 +1,4 @@
+bootblock-y += gpio.c
+
+ramstage-y += variant.c
+ramstage-y += gpio.c
diff --git a/src/mainboard/google/octopus/variants/fleex/gpio.c b/src/mainboard/google/octopus/variants/fleex/gpio.c
new file mode 100644
index 0000000000..ac68569347
--- /dev/null
+++ b/src/mainboard/google/octopus/variants/fleex/gpio.c
@@ -0,0 +1,133 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <boardid.h>
+#include <gpio.h>
+#include <soc/gpio.h>
+
+static const struct pad_config default_override_table[] = {
+
+ PAD_NC(GPIO_50, UP_20K),
+ PAD_NC(GPIO_51, UP_20K),
+ PAD_NC(GPIO_52, UP_20K),
+ PAD_NC(GPIO_53, UP_20K),
+ PAD_NC(GPIO_67, UP_20K),
+ PAD_NC(GPIO_117, UP_20K),
+
+ /* CAM_SOC_EC_SYNC */
+ PAD_CFG_GPI_APIC_IOS(GPIO_134, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,
+ DISPUPD),
+
+ PAD_NC(GPIO_138, DN_20K),
+ PAD_NC(GPIO_139, DN_20K),
+ PAD_NC(GPIO_140, UP_20K),
+ PAD_NC(GPIO_143, UP_20K),
+ PAD_NC(GPIO_144, UP_20K),
+ PAD_NC(GPIO_145, UP_20K),
+
+ /* EN_PP3300_TOUCHSCREEN */
+ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0,
+ DISPUPD),
+
+ PAD_NC(GPIO_161, UP_20K),
+
+ /* EN_PP3300_WLAN_L */
+ PAD_CFG_GPO(GPIO_178, 0, DEEP),
+
+ PAD_NC(GPIO_213, DN_20K),
+ PAD_NC(GPIO_214, DN_20K),
+};
+
+static const struct pad_config bid0_override_table[] = {
+ PAD_NC(GPIO_50, UP_20K),
+ PAD_NC(GPIO_51, UP_20K),
+ PAD_NC(GPIO_52, UP_20K),
+ PAD_NC(GPIO_53, UP_20K),
+ PAD_NC(GPIO_67, UP_20K),
+ PAD_NC(GPIO_117, UP_20K),
+ PAD_NC(GPIO_138, DN_20K),
+ PAD_NC(GPIO_139, DN_20K),
+ PAD_NC(GPIO_140, UP_20K),
+ PAD_NC(GPIO_143, UP_20K),
+ PAD_NC(GPIO_144, UP_20K),
+ PAD_NC(GPIO_145, UP_20K),
+ PAD_NC(GPIO_161, UP_20K),
+ PAD_NC(GPIO_214, DN_20K),
+};
+
+const struct pad_config *variant_override_gpio_table(size_t *num)
+{
+ const struct pad_config *c;
+
+ switch (board_id()) {
+ case 0:
+ case UNDEFINED_STRAPPING_ID:
+ c = bid0_override_table;
+ *num = ARRAY_SIZE(bid0_override_table);
+ break;
+ default:
+ c = default_override_table;
+ *num = ARRAY_SIZE(default_override_table);
+ }
+
+ return c;
+}
+
+/* GPIOs needed prior to ramstage. */
+static const struct pad_config early_gpio_table[] = {
+ /* PCH_WP_OD */
+ PAD_CFG_GPI(GPIO_190, NONE, DEEP),
+ /* H1_PCH_INT_ODL */
+ PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,
+ DISPUPD),
+ /* H1_SLAVE_SPI_CLK_R */
+ PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1),
+ /* H1_SLAVE_SPI_CS_L_R */
+ PAD_CFG_NF(GPIO_80, NONE, DEEP, NF1),
+ /* H1_SLAVE_SPI_MISO */
+ PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1),
+ /* H1_SLAVE_SPI_MOSI_R */
+ PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1),
+
+ /* WLAN_PE_RST */
+ PAD_CFG_GPO(GPIO_164, 0, DEEP),
+
+ /*
+ * ESPI_IO1 acts as ALERT# (which is open-drain) and requies a weak
+ * pull-up for proper operation. Since there is no external pull present
+ * on this platform, configure an internal weak pull-up.
+ */
+ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151, UP_20K, DEEP, NF2, HIZCRx1,
+ ENPU),
+};
+
+const struct pad_config *variant_early_gpio_table(size_t *num)
+{
+ /*
+ * This is a hack to configure EN_PP3300_WLAN based on board id. Once
+ * board id 0 is deprecated, we can get rid of this.
+ */
+ uint32_t bid = board_id();
+
+ if (bid == UNDEFINED_STRAPPING_ID || bid < 1)
+ gpio_output(GPIO_178, 1);
+ else
+ gpio_output(GPIO_178, 0);
+
+ *num = ARRAY_SIZE(early_gpio_table);
+ return early_gpio_table;
+}
diff --git a/src/mainboard/google/octopus/variants/fleex/overridetree.cb b/src/mainboard/google/octopus/variants/fleex/overridetree.cb
index b96f309106..fdd8404ae3 100644
--- a/src/mainboard/google/octopus/variants/fleex/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/fleex/overridetree.cb
@@ -1,6 +1,7 @@
chip soc/intel/apollolake
device domain 0 on
+ device pci 16.1 off end # - I2C 1
device pci 17.1 on
chip drivers/i2c/da7219
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_137_IRQ)"
diff --git a/src/mainboard/google/octopus/variants/fleex/variant.c b/src/mainboard/google/octopus/variants/fleex/variant.c
new file mode 100644
index 0000000000..1ead5e230c
--- /dev/null
+++ b/src/mainboard/google/octopus/variants/fleex/variant.c
@@ -0,0 +1,73 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpi_device.h>
+#include <baseboard/variants.h>
+#include <boardid.h>
+#include <device/device.h>
+#include <drivers/i2c/generic/chip.h>
+#include <drivers/i2c/hid/chip.h>
+#include <soc/gpio.h>
+#include <soc/pci_devs.h>
+#include <string.h>
+
+extern struct chip_operations drivers_i2c_generic_ops;
+extern struct chip_operations drivers_i2c_hid_ops;
+
+void variant_update_devtree(struct device *dev)
+{
+ uint32_t bid;
+ struct device *touchscreen_i2c_host;
+ struct device *child;
+ const struct bus *children_bus;
+ static const struct acpi_gpio new_enable_gpio =
+ ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146);
+
+ bid = board_id();
+
+ /* Nothing to update. */
+ if (bid == UNDEFINED_STRAPPING_ID || bid < 1)
+ return;
+
+ touchscreen_i2c_host = dev_find_slot(0, PCH_DEVFN_I2C7);
+
+ if (touchscreen_i2c_host == NULL)
+ return;
+
+ children_bus = touchscreen_i2c_host->link_list;
+ child = NULL;
+
+ /* Find all children on bus to update touchscreen enable gpio. */
+ while ((child = dev_bus_each_child(children_bus, child)) != NULL) {
+ struct drivers_i2c_generic_config *cfg;
+
+ /* No configration to change. */
+ if (child->chip_info == NULL)
+ continue;
+
+ if (child->chip_ops == &drivers_i2c_generic_ops)
+ cfg = child->chip_info;
+ else if (child->chip_ops == &drivers_i2c_hid_ops) {
+ struct drivers_i2c_hid_config *hid_cfg;
+ hid_cfg = child->chip_info;
+ cfg = &hid_cfg->generic;
+ } else
+ continue;
+
+ /* Update the enable gpio. */
+ memcpy(&cfg->enable_gpio, &new_enable_gpio,
+ sizeof(new_enable_gpio));
+ }
+}