diff options
Diffstat (limited to 'src/mainboard/intel/dg41wv')
| -rw-r--r-- | src/mainboard/intel/dg41wv/romstage.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/intel/dg41wv/romstage.c b/src/mainboard/intel/dg41wv/romstage.c index d1bf1bd1e4..d85c559c23 100644 --- a/src/mainboard/intel/dg41wv/romstage.c +++ b/src/mainboard/intel/dg41wv/romstage.c @@ -23,10 +23,8 @@ #include <cpu/intel/romstage.h> #include <superio/winbond/w83627dhg/w83627dhg.h> #include <superio/winbond/common/winbond.h> -#include <lib.h> #include <northbridge/intel/x4x/iomap.h> #include <device/pnp_def.h> -#include <timestamp.h> #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1) #define LPC_DEV PCI_DEV(0, 0x1f, 0) @@ -100,12 +98,7 @@ void mainboard_romstage_entry(unsigned long bist) if (MCHBAR32(PMSTS_MCHBAR) & PMSTS_WARM_RESET) boot_path = BOOT_PATH_WARM_RESET; - printk(BIOS_DEBUG, "Initializing memory\n"); - timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(boot_path, spd_addrmap); - timestamp_add_now(TS_AFTER_INITRAM); - quick_ram_check(); - printk(BIOS_DEBUG, "Memory initialized\n"); x4x_late_init(s3_resume); |