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Diffstat (limited to 'src/mainboard/intel/dg43gt/acpi')
-rw-r--r--src/mainboard/intel/dg43gt/acpi/ich10_pci_irqs.asl15
-rw-r--r--src/mainboard/intel/dg43gt/acpi/superio.asl14
2 files changed, 4 insertions, 25 deletions
diff --git a/src/mainboard/intel/dg43gt/acpi/ich10_pci_irqs.asl b/src/mainboard/intel/dg43gt/acpi/ich10_pci_irqs.asl
index 8d12675cff..8697580948 100644
--- a/src/mainboard/intel/dg43gt/acpi/ich10_pci_irqs.asl
+++ b/src/mainboard/intel/dg43gt/acpi/ich10_pci_irqs.asl
@@ -1,16 +1,5 @@
-/*
- * This file is part of the coreboot project.
- *
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
/* This is board specific information:
* IRQ routing for the 0:1e.0 PCI bridge of the ICH10
diff --git a/src/mainboard/intel/dg43gt/acpi/superio.asl b/src/mainboard/intel/dg43gt/acpi/superio.asl
index 2fc3d8eee8..0866176b19 100644
--- a/src/mainboard/intel/dg43gt/acpi/superio.asl
+++ b/src/mainboard/intel/dg43gt/acpi/superio.asl
@@ -1,15 +1,5 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
#undef SUPERIO_DEV
#undef SUPERIO_PNP_BASE