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Diffstat (limited to 'src/mainboard/intel/eagleheights/romstage.c')
| -rw-r--r-- | src/mainboard/intel/eagleheights/romstage.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c index 6d3673689a..7eb83c9153 100644 --- a/src/mainboard/intel/eagleheights/romstage.c +++ b/src/mainboard/intel/eagleheights/romstage.c @@ -20,8 +20,6 @@ * MA 02110-1301 USA */ - - #include <delay.h> #include <stdint.h> @@ -236,3 +234,4 @@ void real_main(unsigned long bist) /* Use Intel Core (not Core 2) code for CAR init, any CPU might be used. */ #include "cpu/intel/model_6ex/cache_as_ram_disable.c" + |