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-rw-r--r--src/mainboard/intel/eagleheights/Makefile.inc6
-rw-r--r--src/mainboard/intel/eagleheights/romstage.c (renamed from src/mainboard/intel/eagleheights/auto.c)0
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/intel/eagleheights/Makefile.inc b/src/mainboard/intel/eagleheights/Makefile.inc
index 6466932453..af1b217509 100644
--- a/src/mainboard/intel/eagleheights/Makefile.inc
+++ b/src/mainboard/intel/eagleheights/Makefile.inc
@@ -16,7 +16,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
# Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -33,8 +33,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.d
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/intel/eagleheights/auto.c b/src/mainboard/intel/eagleheights/romstage.c
index d928de5c56..d928de5c56 100644
--- a/src/mainboard/intel/eagleheights/auto.c
+++ b/src/mainboard/intel/eagleheights/romstage.c