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-rw-r--r--src/mainboard/intel/galileo/Kconfig59
-rw-r--r--src/mainboard/intel/galileo/Makefile.inc4
-rw-r--r--src/mainboard/intel/galileo/romstage.c27
3 files changed, 12 insertions, 78 deletions
diff --git a/src/mainboard/intel/galileo/Kconfig b/src/mainboard/intel/galileo/Kconfig
index 0af03e570c..0f49c7f29a 100644
--- a/src/mainboard/intel/galileo/Kconfig
+++ b/src/mainboard/intel/galileo/Kconfig
@@ -23,6 +23,10 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_INTEL_QUARK
select MAINBOARD_HAS_I2C_TPM_ATMEL
select MAINBOARD_HAS_TPM2
+ select PLATFORM_USES_FSP2_0
+ select UDK_2015_BINDING
+ select POSTCAR_STAGE
+
config MAINBOARD_DIR
string
@@ -46,31 +50,6 @@ config GALILEO_GEN2
should initialize.
choice
- prompt "FSP version"
- default FSP_VERSION_2_0
-
-config FSP_VERSION_1_1
- bool "FSP 1.1"
- select PLATFORM_USES_FSP1_1
-# select ADD_FSP_RAW_BIN
- help
- Use FSP 1_1 binary
-config FSP_VERSION_2_0
- bool "FSP 2.0"
- select PLATFORM_USES_FSP2_0
- select UDK_2015_BINDING
- select POSTCAR_STAGE
- help
- Use FSP 2.0 binary
-
-endchoice
-
-config FSP_VERSION
- string
- default "fsp1_1" if FSP_VERSION_1_1
- default "fsp2_0" if FSP_VERSION_2_0
-
-choice
prompt "FSP binary type"
default FSP_BUILD_TYPE_DEBUG
@@ -92,28 +71,14 @@ config FSP_BUILD_TYPE
choice
prompt "FSP type"
- depends on FSP_VERSION_2_0 || FSP_VERSION_1_1
- default FSP_TYPE_1_1_PEI if FSP_VERSION_1_1
- default FSP_TYPE_2_0_PEI if FSP_VERSION_2_0
+ default FSP_TYPE_2_0_PEI
-config FSP_TYPE_1_1
- bool "MemInit subroutine"
- depends on FSP_VERSION_1_1
- help
- FSP 1.1 implemented as subroutines, no EDK-II cores
-config FSP_TYPE_1_1_PEI
- bool "SEC + PEI Core + MemInit PEIM"
- depends on FSP_VERSION_1_1
- help
- FSP 1.1 implemented using SEC and PEI core
config FSP_TYPE_2_0
bool "MemInit subroutine"
- depends on FSP_VERSION_2_0
help
FSP 2.0 implemented as subroutines, no EDK-II cores
config FSP_TYPE_2_0_PEI
bool "SEC + PEI Core + MemInit PEIM"
- depends on FSP_VERSION_2_0
help
FSP 2.0 implemented using SEC and PEI core
@@ -121,26 +86,22 @@ endchoice
config FSP_TYPE
string
- default "Fsp1_1" if FSP_TYPE_1_1
- default "Fsp1_1Pei" if FSP_TYPE_1_1_PEI
default "Fsp2_0" if FSP_TYPE_2_0
default "Fsp2_0Pei" if FSP_TYPE_2_0_PEI
config FSP_DEBUG_ALL
bool "Enable all FSP debug support"
- depends on FSP_VERSION_2_0 || FSP_VERSION_1_1
default y
# Enable display and verification for coreboot build tests
select DISPLAY_HOBS
select DISPLAY_MTRRS
select DISPLAY_SMM_MEMORY_MAP
select DISPLAY_UPD_DATA
- select DISPLAY_ESRAM_LAYOUT if FSP_VERSION_2_0
- select DISPLAY_FSP_CALLS_AND_STATUS if FSP_VERSION_2_0
- select DISPLAY_FSP_HEADER if FSP_VERSION_2_0
- select POSTCAR_CONSOLE if FSP_VERSION_2_0
- select VERIFY_HOBS if FSP_VERSION_2_0
- select DISPLAY_FSP_ENTRY_POINTS if FSP_VERSION_1_1
+ select DISPLAY_ESRAM_LAYOUT
+ select DISPLAY_FSP_CALLS_AND_STATUS
+ select DISPLAY_FSP_HEADER
+ select POSTCAR_CONSOLE
+ select VERIFY_HOBS
help
Turn on debug support to display HOBS, MTRRS, SMM_MEMORY_MAP, UPD_DATA
also turn on FSP 2.0 debug support for ESRAM_LAYOUT,
diff --git a/src/mainboard/intel/galileo/Makefile.inc b/src/mainboard/intel/galileo/Makefile.inc
index 60c0ee0cd8..d2ba44ff89 100644
--- a/src/mainboard/intel/galileo/Makefile.inc
+++ b/src/mainboard/intel/galileo/Makefile.inc
@@ -13,9 +13,7 @@
## GNU General Public License for more details.
##
-ifeq ($(CONFIG_PLATFORM_USES_FSP2_0)$(CONFIG_PLATFORM_USES_FSP1_1),y)
-CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/$(CONFIG_FSP_VERSION)/quark
-endif
+CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/quark
bootblock-y += gpio.c
bootblock-y += reg_access.c
diff --git a/src/mainboard/intel/galileo/romstage.c b/src/mainboard/intel/galileo/romstage.c
index baf9af37cb..7e06c94d05 100644
--- a/src/mainboard/intel/galileo/romstage.c
+++ b/src/mainboard/intel/galileo/romstage.c
@@ -1,26 +1 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google Inc.
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1)
-#include <fsp/romstage.h>
-
-/* All FSP specific code goes in this block */
-void mainboard_romstage_entry(struct romstage_params *rp)
-{
- /* Call back into chipset code with platform values updated. */
- romstage_common(rp);
-}
-#endif /* IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1) */
+/* Dummy */