diff options
Diffstat (limited to 'src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb')
| -rw-r--r-- | src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb index 6f45a46a7d..5c41f22d8a 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb @@ -148,13 +148,23 @@ chip soc/intel/skylake register "PcieRpClkReqSupport[5]" = "1" register "PcieRpClkReqSupport[8]" = "1" - # RP 9 uses SRCCLKREQ5# + # RP 3 uses SRCCLKREQ5# register "PcieRpClkReqNumber[2]" = "5" register "PcieRpClkReqNumber[3]" = "2" register "PcieRpClkReqNumber[4]" = "3" register "PcieRpClkReqNumber[5]" = "4" register "PcieRpClkReqNumber[8]" = "1" + # RP 3 uses uses CLK SRC 5# + register "PcieRpClkSrcNumber[2]" = "5" + # RP 4 uses uses CLK SRC 2# + register "PcieRpClkSrcNumber[3]" = "2" + # RP 5 uses uses CLK SRC 3# + register "PcieRpClkSrcNumber[4]" = "3" + # RP 6 uses uses CLK SRC 4# + register "PcieRpClkSrcNumber[5]" = "4" + # RP 9 uses uses CLK SRC 1# + register "PcieRpClkSrcNumber[8]" = "1" # USB 2.0 Enable all ports register "usb2_ports[0]" = "USB2_PORT_MAX(OC0)" # TYPE-A Port |