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Diffstat (limited to 'src/mainboard/intel/saddlebrook/devicetree.cb')
-rw-r--r--src/mainboard/intel/saddlebrook/devicetree.cb5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb
index 8f78249b3b..2f84a5dde5 100644
--- a/src/mainboard/intel/saddlebrook/devicetree.cb
+++ b/src/mainboard/intel/saddlebrook/devicetree.cb
@@ -140,11 +140,6 @@ chip soc/intel/skylake
.voltage_limit = 0x5F0 \
}"
- # Skip coreboot MP Init
- register "common_soc_config" = "{
- .use_fsp_mp_init = 1,
- }"
-
# Enable x1 slot
register "PcieRpEnable[7]" = "1"
register "PcieRpClkReqSupport[7]" = "1"